[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: VRR, LRR, and M/N stuff

[Patchwork]

== Series Details ==

Series: drm/i915: VRR, LRR, and M/N stuff
URL   : https://patchwork.freedesktop.org/series/123171/
State : warning

== Summary ==

Error: dim checkpatch failed
ceb5c675ed7d drm/i915: Move psr unlock out from the pipe update critical section
bcfae40b96e1 drm/i915: Change intel_pipe_update_{start, end}() calling convention
3a38a23eca3d drm/i915: Extract intel_crtc_vblank_evade_scanlines()
81dac61c36e3 drm/i915: Enable VRR later during fastsets
00a0d797849e drm/i915: Adjust seamless_m_n flag behaviour
a2b041a223d7 drm/i915: Optimize out redundant M/N updates
7b06d470ac13 drm/i915: Relocate is_in_vrr_range()
39518ca01e6b drm/i915: Validate that the timings are within the VRR range
15ff83c1a9a6 drm/i915: Disable VRR during seamless M/N changes
f083c4c91c2d drm/i915: Update VRR parameters in fastset
d141d9d2ed22 drm/i915: Assert that VRR is off during vblank evasion if necessary
2254c65953d4 drm/i915: Implement transcoder LRR for TGL+
-:173: WARNING:LONG_LINE: line length of 108 exceeds 100 columns
#173: FILE: drivers/gpu/drm/i915/display/intel_display.c:5589:
+	    (old_crtc_state->hw.adjusted_mode.crtc_vtotal == new_crtc_state->hw.adjusted_mode.crtc_vtotal &&

-:174: WARNING:LONG_LINE: line length of 115 exceeds 100 columns
#174: FILE: drivers/gpu/drm/i915/display/intel_display.c:5590:
+	     old_crtc_state->hw.adjusted_mode.crtc_vblank_end == new_crtc_state->hw.adjusted_mode.crtc_vblank_end))

total: 0 errors, 2 warnings, 0 checks, 208 lines checked