[Intel-gfx] [PATCH v4 0/3] drm/i915/pxp/mtl: Update gsc-heci cmd submission to align with fw/hw spec
Alan Previn
alan.previn.teres.alexis at intel.com
Thu Sep 7 00:15:46 UTC 2023
For MTL, update the GSC-HECI packet size and the max firmware
response timeout to match internal fw specs. Enforce setting
run-alone bit in LRC for protected contexts.
Changes from prio revs:
v3: - Patch #1. Only start counting the request completion
timeout from after the request has started (Daniele).
v2: - Patch #3: fix sparse warning reported by kernel test robot.
v1: - N/A (Re-test)
Signed-off-by: Alan Previn <alan.previn.teres.alexis at intel.com>
Alan Previn (3):
drm/i915/pxp/mtl: Update pxp-firmware response timeout
drm/i915/pxp/mtl: Update pxp-firmware packet size
drm/i915/lrc: User PXP contexts requires runalone bit in lrc
drivers/gpu/drm/i915/gt/intel_lrc.c | 23 +++++++++++++++++++
.../i915/gt/uc/intel_gsc_uc_heci_cmd_submit.c | 20 ++++++++++++++--
.../i915/gt/uc/intel_gsc_uc_heci_cmd_submit.h | 6 +++++
.../drm/i915/pxp/intel_pxp_cmd_interface_43.h | 4 ++--
drivers/gpu/drm/i915/pxp/intel_pxp_gsccs.h | 11 +++++----
5 files changed, 56 insertions(+), 8 deletions(-)
base-commit: 5008076127a9599704e98fb4de3761743d943dd0
--
2.39.0
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