[Intel-gfx] [PATCH 05/11] drm/i915: Check lane count when determining FEC support
Ville Syrjälä
ville.syrjala at linux.intel.com
Wed Sep 13 14:41:48 UTC 2023
On Thu, May 25, 2023 at 11:09:30AM +0300, Luca Coelho wrote:
> On Tue, 2023-05-02 at 17:39 +0300, Ville Syrjala wrote:
> > From: Ville Syrjälä <ville.syrjala at linux.intel.com>
> >
> > ICL doesn't support FEC with a x1 DP link. Make sure
> > we don't try to enable FEC in such cases.
> >
> > Signed-off-by: Ville Syrjälä <ville.syrjala at linux.intel.com>
> > ---
> > drivers/gpu/drm/i915/display/intel_dp.c | 23 ++++++++++++-----------
> > 1 file changed, 12 insertions(+), 11 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
> > index b27b4fb71ed7..9ac199444155 100644
> > --- a/drivers/gpu/drm/i915/display/intel_dp.c
> > +++ b/drivers/gpu/drm/i915/display/intel_dp.c
> > @@ -1218,7 +1218,8 @@ static bool intel_dp_source_supports_fec(struct intel_dp *intel_dp,
> > if (DISPLAY_VER(dev_priv) >= 12)
> > return true;
> >
> > - if (DISPLAY_VER(dev_priv) == 11 && encoder->port != PORT_A)
> > + if (DISPLAY_VER(dev_priv) == 11 &&
> > + encoder->port != PORT_A && pipe_config->lane_count != 1)
> > return true;
> >
> > return false;
> > @@ -1234,7 +1235,7 @@ static bool intel_dp_supports_fec(struct intel_dp *intel_dp,
> > static bool intel_dp_supports_dsc(struct intel_dp *intel_dp,
> > const struct intel_crtc_state *crtc_state)
> > {
> > - if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_DP) && !crtc_state->fec_enable)
> > + if (!intel_dp_is_edp(intel_dp) && !crtc_state->fec_enable)
>
> I'm probably missing something, but this change...
This should have been a separate change I suppose. What this is
currently asserting is DP-SST needs FEC to use DSC, but so does DP-MST
which this is totally forgetting to check. eDP is only case where we
can skip FEC.
>
>
> > return false;
> >
> > return intel_dsc_source_support(crtc_state) &&
> > @@ -1580,15 +1581,6 @@ int intel_dp_dsc_compute_config(struct intel_dp *intel_dp,
> > int pipe_bpp;
> > int ret;
> >
> > - pipe_config->fec_enable = !intel_dp_is_edp(intel_dp) &&
> > - intel_dp_supports_fec(intel_dp, pipe_config);
> > -
> > - if (!intel_dp_supports_dsc(intel_dp, pipe_config))
> > - return -EINVAL;
> > -
> > - if (!intel_dp_dsc_supports_format(intel_dp, pipe_config->output_format))
> > - return -EINVAL;
> > -
> > if (compute_pipe_bpp)
> > pipe_bpp = intel_dp_dsc_compute_bpp(intel_dp, conn_state->max_requested_bpc);
> > else
> > @@ -1615,6 +1607,15 @@ int intel_dp_dsc_compute_config(struct intel_dp *intel_dp,
> > pipe_config->port_clock = limits->max_rate;
> > pipe_config->lane_count = limits->max_lane_count;
> >
> > + pipe_config->fec_enable = !intel_dp_is_edp(intel_dp) &&
> > + intel_dp_supports_fec(intel_dp, pipe_config);
> > +
> > + if (!intel_dp_supports_dsc(intel_dp, pipe_config))
> > + return -EINVAL;
> > +
> > + if (!intel_dp_dsc_supports_format(intel_dp, pipe_config->output_format))
> > + return -EINVAL;
> > +
> > if (intel_dp_is_edp(intel_dp)) {
> > pipe_config->dsc.compressed_bpp =
> > min_t(u16, drm_edp_dsc_sink_output_bpp(intel_dp->dsc_dpcd) >> 4,
>
> ...and this code move are not explained in the commit message? How are
> they related?
This is moved becaue we need to compute lanel_count before we can
actually check it.
--
Ville Syrjälä
Intel
More information about the Intel-gfx
mailing list