[Intel-gfx] [PATCH v3 00/25] drm/i915: Improve BW management on shared display links
Imre Deak
imre.deak at intel.com
Thu Sep 14 19:26:34 UTC 2023
This is v3 of [1] addressing the review comments, adding R-bs
and the following changes based on further testing / offline
discussions:
- Return -ENOSPC to userspace in case of a link BW limit
failure. (Patch 9, thanks to Karthik B S for the related IGT
testing)
- Replace fractional bpp fix with a patch from Ville. (Patch 12)
- Disable DSC PPS SDP during output disabling. (Patch 20, Ville)
[1] https://lore.kernel.org/intel-gfx/20230824080517.693621-1-imre.deak@intel.com
Cc: Jani Nikula <jani.nikula at linux.intel.com>
Cc: Stanislav Lisovskiy <stanislav.lisovskiy at intel.com>
Cc: Lyude Paul <lyude at redhat.com>
Cc: Ville Syrjälä <ville.syrjala at linux.intel.com>
Cc: Luca Coelho <luciano.coelho at intel.com>
Imre Deak (24):
drm/i915/dp: Factor out helpers to compute the link limits
drm/i915/dp: Track the pipe and link bpp limits separately
drm/i915/dp: Skip computing a non-DSC link config if DSC is needed
drm/i915/dp: Update the link bpp limits for DSC mode
drm/i915/dp: Limit the output link bpp in DSC mode
drm/i915: Add helper to modeset a set of pipes
drm/i915: During modeset forcing handle inactive but enabled pipes
drm/i915: Factor out a helper to check/compute all the CRTC states
drm/i915: Add helpers for BW management on shared display links
drm/i915/fdi: Improve FDI BW sharing between pipe B and C
drm/i915/fdi: Recompute state for affected CRTCs on FDI links
drm/dp_mst: Add a way to calculate PBN values with FEC overhead
drm/dp_mst: Add helper to determine if an MST port is downstream of
another port
drm/dp_mst: Factor out a helper to check the atomic state of a
topology manager
drm/dp_mst: Swap the order of checking root vs. non-root port BW
limitations
drm/i915/dp_mst: Fix PBN calculation with FEC overhead
drm/i915/dp_mst: Add atomic state for all streams on pre-tgl platforms
drm/i915/dp_mst: Program the DSC PPS SDP for each stream
drm/i915/dp: Make sure the DSC PPS SDP is disabled whenever DSC is
disabled
drm/i915/dp_mst: Enable DSC decompression if any stream needs this
drm/i915/dp_mst: Add missing DSC compression disabling
drm/i915/dp_mst: Allow DSC only for sink ports of the first branch
device
drm/i915/dp_mst: Improve BW sharing between MST streams
drm/i915/dp_mst: Check BW limitations only after all streams are
computed
Ville Syrjälä (1):
drm/dp_mst: Fix fractional DSC bpp handling
.../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 2 +-
.../display/amdgpu_dm/amdgpu_dm_mst_types.c | 2 +-
drivers/gpu/drm/display/drm_dp_mst_topology.c | 181 ++++++++---
drivers/gpu/drm/i915/Makefile | 1 +
drivers/gpu/drm/i915/display/g4x_hdmi.c | 6 +-
drivers/gpu/drm/i915/display/intel_cdclk.c | 2 +-
drivers/gpu/drm/i915/display/intel_crt.c | 7 +
drivers/gpu/drm/i915/display/intel_crtc.c | 1 +
drivers/gpu/drm/i915/display/intel_ddi.c | 12 +-
drivers/gpu/drm/i915/display/intel_display.c | 203 +++++++++----
drivers/gpu/drm/i915/display/intel_display.h | 6 +-
.../drm/i915/display/intel_display_types.h | 26 +-
drivers/gpu/drm/i915/display/intel_dp.c | 196 +++++++++---
drivers/gpu/drm/i915/display/intel_dp.h | 17 +-
drivers/gpu/drm/i915/display/intel_dp_mst.c | 287 +++++++++++++++---
drivers/gpu/drm/i915/display/intel_dp_mst.h | 3 +
drivers/gpu/drm/i915/display/intel_fdi.c | 140 +++++++--
drivers/gpu/drm/i915/display/intel_fdi.h | 5 +
drivers/gpu/drm/i915/display/intel_link_bw.c | 244 +++++++++++++++
drivers/gpu/drm/i915/display/intel_link_bw.h | 39 +++
drivers/gpu/drm/i915/display/intel_lvds.c | 10 +-
drivers/gpu/drm/i915/display/intel_sdvo.c | 10 +-
drivers/gpu/drm/i915/display/skl_watermark.c | 2 +-
drivers/gpu/drm/nouveau/dispnv50/disp.c | 3 +-
.../gpu/drm/tests/drm_dp_mst_helper_test.c | 19 +-
include/drm/display/drm_dp_mst_helper.h | 9 +-
26 files changed, 1203 insertions(+), 230 deletions(-)
create mode 100644 drivers/gpu/drm/i915/display/intel_link_bw.c
create mode 100644 drivers/gpu/drm/i915/display/intel_link_bw.h
--
2.37.2
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