[Intel-gfx] [PATCH 7/7] drm/i915: Enable GGTT updates with binder in MTL
Gwan-gyeong Mun
gwan-gyeong.mun at intel.com
Wed Sep 20 09:02:31 UTC 2023
Hi Nirmoy,
https://gfxspecs.intel.com/Predator/Home/Index/52885?dstFilter=MTL&mode=Filter
I can't find Wa_13010847436 and Wa_14019519902 in the above link, where
can I check these WA?
Br,
G.G.
On 9/18/23 8:02 PM, Nirmoy Das wrote:
> MTL can hang because of a HW bug while parallel reading/writing
> from/to LMEM/GTTMMADR BAR so try to reduce GGTT update
> related pci transactions with blitter command as recommended
> for Wa_13010847436 and Wa_14019519902.
>
> Signed-off-by: Nirmoy Das <nirmoy.das at intel.com>
> Reviewed-by: Oak Zeng <oak.zeng at intel.com>
> ---
> drivers/gpu/drm/i915/gt/intel_gtt.c | 3 ++-
> 1 file changed, 2 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/gt/intel_gtt.c b/drivers/gpu/drm/i915/gt/intel_gtt.c
> index 4c89eb8d9af7..4fbed27ef0ec 100644
> --- a/drivers/gpu/drm/i915/gt/intel_gtt.c
> +++ b/drivers/gpu/drm/i915/gt/intel_gtt.c
> @@ -23,7 +23,8 @@
>
> bool i915_ggtt_require_binder(struct drm_i915_private *i915)
> {
> - return false;
> + /* Wa_13010847436 & Wa_14019519902 */
> + return MEDIA_VER_FULL(i915) == IP_VER(13, 0);
> }
>
> static bool intel_ggtt_update_needs_vtd_wa(struct drm_i915_private *i915)
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