[Intel-gfx] [PATCH 3/4] drm/i915/gvt: move struct engine_mmio to mmio_context.c

[Jani Nikula]

struct engine_mmio is not used outside of mmio_context.c. Hide it, and
reduce includes.

Signed-off-by: Jani Nikula <jani.nikula at intel.com>
---
 drivers/gpu/drm/i915/gvt/gvt.h          |  2 ++
 drivers/gpu/drm/i915/gvt/mmio_context.c |  8 ++++++++
 drivers/gpu/drm/i915/gvt/mmio_context.h | 10 ----------
 3 files changed, 10 insertions(+), 10 deletions(-)

diff --git a/drivers/gpu/drm/i915/gvt/gvt.h b/drivers/gpu/drm/i915/gvt/gvt.h
index 3a0624fe63bf..c57aba09091f 100644
--- a/drivers/gpu/drm/i915/gvt/gvt.h
+++ b/drivers/gpu/drm/i915/gvt/gvt.h
@@ -60,6 +60,8 @@
 
 #define GVT_MAX_VGPU 8
 
+struct engine_mmio;
+
 /* Describe per-platform limitations. */
 struct intel_gvt_device_info {
 	u32 max_support_vgpus;
diff --git a/drivers/gpu/drm/i915/gvt/mmio_context.c b/drivers/gpu/drm/i915/gvt/mmio_context.c
index 490e8ae51228..273db14fd5fc 100644
--- a/drivers/gpu/drm/i915/gvt/mmio_context.c
+++ b/drivers/gpu/drm/i915/gvt/mmio_context.c
@@ -45,6 +45,14 @@
 
 #define GEN9_MOCS_SIZE		64
 
+struct engine_mmio {
+	enum intel_engine_id id;
+	i915_reg_t reg;
+	u32 mask;
+	bool in_context;
+	u32 value;
+};
+
 /* Raw offset is appened to each line for convenience. */
 static struct engine_mmio gen8_engine_mmio_list[] __cacheline_aligned = {
 	{RCS0, RING_MODE_GEN7(RENDER_RING_BASE), 0xffff, false}, /* 0x229c */
diff --git a/drivers/gpu/drm/i915/gvt/mmio_context.h b/drivers/gpu/drm/i915/gvt/mmio_context.h
index 9540813b88e5..a821edf574dd 100644
--- a/drivers/gpu/drm/i915/gvt/mmio_context.h
+++ b/drivers/gpu/drm/i915/gvt/mmio_context.h
@@ -39,8 +39,6 @@
 #include <linux/types.h>
 
 #include "gt/intel_engine_regs.h"
-#include "gt/intel_engine_types.h"
-#include "gt/intel_lrc_reg.h"
 
 struct i915_request;
 struct intel_context;
@@ -48,14 +46,6 @@ struct intel_engine_cs;
 struct intel_gvt;
 struct intel_vgpu;
 
-struct engine_mmio {
-	enum intel_engine_id id;
-	i915_reg_t reg;
-	u32 mask;
-	bool in_context;
-	u32 value;
-};
-
 void intel_gvt_switch_mmio(struct intel_vgpu *pre,
 			   struct intel_vgpu *next,
 			   const struct intel_engine_cs *engine);
-- 
2.39.2