[PATCH 00/18] drm/i915: PLL refactoring

[Ville Syrjala]

From: Ville Syrjälä <ville.syrjala at linux.intel.com>

A bunch of refactoring around PLLs. Main feature is 
the unionization of dpll_hw_state. The eventual goal
is to unify the approach for PLLs across all platforms
instead of the current "shared PLLs are somehow
different than other PLLs" approach.

Ville Syrjälä (18):
  drm/i915: Replace hand rolled PLL state dump with
    intel_dpll_dump_hw_state()
  drm/i915: Use printer for the rest of PLL debugfs dump
  drm/i915: Rename PLL hw_state variables/arguments
  drm/i915: Introduce some local PLL state variables
  drm/i915: Extract ilk_fb_cb_factor()
  drm/i915: Extract ilk_dpll_compute_fp()
  drm/i915: Extract i9xx_dpll_get_hw_state()
  drm/i915: Pass the PLL hw_state to pll->enable()
  drm/i915: Extract i965_dpll_md()
  drm/i915: Extract {i9xx,i8xx,ilk}_dpll()
  drm/i915: Inline {i9xx,ilk}_update_pll_dividers()
  drm/i915: Modernize i9xx_pll_refclk()
  drm/i915: Drop pointless 'crtc' argument from *_crtc_clock_get()
  drm/i915: s/pipe_config/crtc_state/ in legacy PLL code
  drm/i915: Add local DPLL 'hw_state' variables
  drm/i915: Carve up struct intel_dpll_hw_state
  drm/i915: Unionize dpll_hw_state
  drm/i915: Suck snps/cx0 PLL states into dpll_hw_state

 drivers/gpu/drm/i915/display/intel_cx0_phy.c  |  20 +-
 drivers/gpu/drm/i915/display/intel_ddi.c      |   8 +-
 drivers/gpu/drm/i915/display/intel_display.c  |  30 +-
 .../drm/i915/display/intel_display_debugfs.c  |  39 +-
 .../drm/i915/display/intel_display_types.h    |  43 +-
 drivers/gpu/drm/i915/display/intel_dpll.c     | 338 +++++++-----
 drivers/gpu/drm/i915/display/intel_dpll.h     |  12 +-
 drivers/gpu/drm/i915/display/intel_dpll_mgr.c | 489 ++++++++++--------
 drivers/gpu/drm/i915/display/intel_dpll_mgr.h |  80 ++-
 .../gpu/drm/i915/display/intel_pch_display.c  |   4 +-
 drivers/gpu/drm/i915/display/intel_snps_phy.c |   6 +-
 11 files changed, 581 insertions(+), 488 deletions(-)

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2.43.2