[PATCH v2 00/11] drm/i915/dp: Few MTL/DSC and a UHBR monitor fix

[Imre Deak]

This is v2 of [1], after additional testing on the DELL U3224KBA and
Unigraf UCD-500 CTS devices and based on that adding a 3% overhead to
DPT/DSC BW limit calculation in patch 4 to fix a 6k mode on both of
these devices.

Cc: Ankit Nautiyal <ankit.k.nautiyal at intel.com>

[1] https://lore.kernel.org/all/20240320201152.3487892-1-imre.deak@intel.com

Imre Deak (11):
  drm/i915/dp: Fix DSC line buffer depth programming
  drm/i915/dp_mst: Fix symbol clock when calculating the DSC DPT bpp
    limit
  drm/i915/dp_mst: Fix BW limit check when calculating DSC DPT bpp
  drm/i915/dp_mst: Account for channel coding efficiency in the DSC DPT
    bpp limit
  drm/i915/dp_mst: Account with the DSC DPT bpp limit on MTL
  drm/i915/dp_mst: Sanitize calculating the DSC DPT bpp limit
  drm/dp: Add drm_dp_uhbr_channel_coding_supported()
  drm/dp_mst: Factor out drm_dp_mst_port_is_logical()
  drm/dp_mst: Add drm_dp_mst_aux_for_parent()
  drm/i915/dp_mst: Make HBLANK expansion quirk work for logical ports
  drm/i915/dp_mst: Enable HBLANK expansion quirk for UHBR rates

 drivers/gpu/drm/display/drm_dp_helper.c       |   2 +
 drivers/gpu/drm/display/drm_dp_mst_topology.c |  22 +++-
 drivers/gpu/drm/i915/display/intel_dp.c       |  18 ++--
 drivers/gpu/drm/i915/display/intel_dp_mst.c   | 102 ++++++++++++------
 include/drm/display/drm_dp_helper.h           |   6 ++
 include/drm/display/drm_dp_mst_helper.h       |   7 ++
 include/drm/display/drm_dsc.h                 |   3 -
 7 files changed, 113 insertions(+), 47 deletions(-)

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2.43.3