[PATCH 2/2] drm/xe/display: remove compat raw reg read/write support

[Sripada, Radhakrishna]

LGTM,
Reviewed-by: Radhakrishna Sripada <radhakrishna.sripada at intel.com>

> -----Original Message-----
> From: Intel-xe <intel-xe-bounces at lists.freedesktop.org> On Behalf Of Jani Nikula
> Sent: Monday, April 8, 2024 5:55 AM
> To: intel-gfx at lists.freedesktop.org; intel-xe at lists.freedesktop.org
> Cc: Nikula, Jani <jani.nikula at intel.com>; De Marchi, Lucas
> <lucas.demarchi at intel.com>
> Subject: [PATCH 2/2] drm/xe/display: remove compat raw reg read/write support
> 
> The i915 display code no longer uses these interfaces. Remove them.
> 
> Signed-off-by: Jani Nikula <jani.nikula at intel.com>
> ---
>  .../drm/xe/compat-i915-headers/intel_uncore.h | 24 -------------------
>  1 file changed, 24 deletions(-)
> 
> diff --git a/drivers/gpu/drm/xe/compat-i915-headers/intel_uncore.h
> b/drivers/gpu/drm/xe/compat-i915-headers/intel_uncore.h
> index ef79793caa72..a672165ececf 100644
> --- a/drivers/gpu/drm/xe/compat-i915-headers/intel_uncore.h
> +++ b/drivers/gpu/drm/xe/compat-i915-headers/intel_uncore.h
> @@ -148,28 +148,4 @@ static inline void intel_uncore_write_notrace(struct
> intel_uncore *uncore,
>  	xe_mmio_write32(__compat_uncore_to_gt(uncore), reg, val);
>  }
> 
> -static inline void __iomem *intel_uncore_regs(struct intel_uncore *uncore)
> -{
> -	struct xe_device *xe = container_of(uncore, struct xe_device, uncore);
> -
> -	return xe_device_get_root_tile(xe)->mmio.regs;
> -}
> -
> -/*
> - * The raw_reg_{read,write} macros are intended as a micro-optimization for
> - * interrupt handlers so that the pointer indirection on uncore->regs can
> - * be computed once (and presumably cached in a register) instead of generating
> - * extra load instructions for each MMIO access.
> - *
> - * Given that these macros are only intended for non-GSI interrupt registers
> - * (and the goal is to avoid extra instructions generated by the compiler),
> - * these macros do not account for uncore->gsi_offset.  Any caller that needs
> - * to use these macros on a GSI register is responsible for adding the
> - * appropriate GSI offset to the 'base' parameter.
> - */
> -#define raw_reg_read(base, reg) \
> -	readl(base + i915_mmio_reg_offset(reg))
> -#define raw_reg_write(base, reg, value) \
> -	writel(value, base + i915_mmio_reg_offset(reg))
> -
>  #endif /* __INTEL_UNCORE_H__ */
> --
> 2.39.2