✗ Fi.CI.CHECKPATCH: warning for drm/i915: BXT/GLK per-lane vswing and PHY reg cleanup (rev4)

[Patchwork]

== Series Details ==

Series: drm/i915: BXT/GLK per-lane vswing and PHY reg cleanup (rev4)
URL   : https://patchwork.freedesktop.org/series/132390/
State : warning

== Summary ==

Error: dim checkpatch failed
9d4d94ee42bd drm/i915/dpio: Clean up bxt/glk PHY registers
c9e16261ad26 drm/i915/dpio: Add per-lane PHY TX register definitons for bxt/glk
-:93: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'lane' - possible side-effects?
#93: FILE: drivers/gpu/drm/i915/i915_reg.h:558:
+#define _BXT_LANE_OFFSET(lane)           (((lane) >> 1) * 0x200 + \
+					  ((lane) & 1) * 0x80)

total: 0 errors, 0 warnings, 1 checks, 171 lines checked
5b88483d0d7f drm/i915/dpio: Extract bxt_dpio_phy_regs.h
-:17: WARNING:FILE_PATH_CHANGES: added, moved or deleted file(s), does MAINTAINERS need updating?
#17: 
new file mode 100644

-:49: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'lane' - possible side-effects?
#49: FILE: drivers/gpu/drm/i915/display/bxt_dpio_phy_regs.h:28:
+#define _BXT_LANE_OFFSET(lane)           (((lane) >> 1) * 0x200 + \
+					  ((lane) & 1) * 0x80)

total: 0 errors, 1 warnings, 1 checks, 589 lines checked
b0e6063b8305 drm/i915/dpio: Introdude bxt_ddi_phy_rmw_grp()
ac2168883878 drm/i915/dpio: Use intel_de_rmw() for BXT DPIO latency optim setup
4bdb37957de9 drm/i915/dpio: s/ddi/dpio/ for bxt/glk PHY stuff
-:462: CHECK:LINE_SPACING: Please use a blank line after function/struct/union/enum declarations
#462: FILE: drivers/gpu/drm/i915/display/intel_dpio_phy.h:80:
 }
+static inline void bxt_dpio_phy_set_signal_levels(struct intel_encoder *encoder,

-:467: CHECK:LINE_SPACING: Please use a blank line after function/struct/union/enum declarations
#467: FILE: drivers/gpu/drm/i915/display/intel_dpio_phy.h:84:
 }
+static inline void bxt_dpio_phy_init(struct drm_i915_private *dev_priv, enum dpio_phy phy)

-:471: CHECK:LINE_SPACING: Please use a blank line after function/struct/union/enum declarations
#471: FILE: drivers/gpu/drm/i915/display/intel_dpio_phy.h:87:
 }
+static inline void bxt_dpio_phy_uninit(struct drm_i915_private *dev_priv, enum dpio_phy phy)

-:476: CHECK:LINE_SPACING: Please use a blank line after function/struct/union/enum declarations
#476: FILE: drivers/gpu/drm/i915/display/intel_dpio_phy.h:90:
 }
+static inline bool bxt_dpio_phy_is_enabled(struct drm_i915_private *dev_priv,

-:483: CHECK:LINE_SPACING: Please use a blank line after function/struct/union/enum declarations
#483: FILE: drivers/gpu/drm/i915/display/intel_dpio_phy.h:95:
 }
+static inline bool bxt_dpio_phy_verify_state(struct drm_i915_private *dev_priv,

-:489: CHECK:LINE_SPACING: Please use a blank line after function/struct/union/enum declarations
#489: FILE: drivers/gpu/drm/i915/display/intel_dpio_phy.h:100:
 }
+static inline u8 bxt_dpio_phy_calc_lane_lat_optim_mask(u8 lane_count)

-:495: CHECK:LINE_SPACING: Please use a blank line after function/struct/union/enum declarations
#495: FILE: drivers/gpu/drm/i915/display/intel_dpio_phy.h:104:
 }
+static inline void bxt_dpio_phy_set_lane_optim_mask(struct intel_encoder *encoder,

-:500: CHECK:LINE_SPACING: Please use a blank line after function/struct/union/enum declarations
#500: FILE: drivers/gpu/drm/i915/display/intel_dpio_phy.h:108:
 }
+static inline u8 bxt_dpio_phy_get_lane_lat_optim_mask(struct intel_encoder *encoder)

total: 0 errors, 0 warnings, 8 checks, 444 lines checked
ed9ca5a90260 drm/i915/dpio: Program bxt/glk PHY TX registers per-lane
15aaf189bd35 drm/i915: Enable per-lane DP drive settings for bxt/glk