[PATCH] drm/i915/panelreplay: Panel replay workaround with VRR
Animesh Manna
animesh.manna at intel.com
Wed Feb 7 14:35:09 UTC 2024
Panel Replay VSC SDP not getting sent when VRR is enabled
and W1 and W2 are 0. So Program Set Context Latency in
TRANS_SET_CONTEXT_LATENCY register to at least a value of 1.
Signed-off-by: Animesh Manna <animesh.manna at intel.com>
---
drivers/gpu/drm/i915/display/intel_display.c | 12 ++++++++++--
1 file changed, 10 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index 1b844cac4c58..c1ec78b5b6c5 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -2618,8 +2618,16 @@ static void intel_set_transcoder_timings(const struct intel_crtc_state *crtc_sta
* TRANS_SET_CONTEXT_LATENCY to configure the pipe vblank start.
*/
if (DISPLAY_VER(dev_priv) >= 13) {
- intel_de_write(dev_priv, TRANS_SET_CONTEXT_LATENCY(cpu_transcoder),
- crtc_vblank_start - crtc_vdisplay);
+ /*
+ * WA: Program Set Context Latency in TRANS_SET_CONTEXT_LATENCY register
+ * to at least a value of 1 when Panel Replay is enabled with VRR.
+ */
+ if (crtc_state->vrr.enable && crtc_state->has_panel_replay &&
+ (crtc_vblank_start == crtc_vdisplay))
+ intel_de_write(dev_priv, TRANS_SET_CONTEXT_LATENCY(cpu_transcoder), 1);
+ else
+ intel_de_write(dev_priv, TRANS_SET_CONTEXT_LATENCY(cpu_transcoder),
+ crtc_vblank_start - crtc_vdisplay);
/*
* VBLANK_START not used by hw, just clear it
--
2.29.0
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