[PATCH] drm/i915/scaler: Update Pipe src size check for DISPLAY_VER >= 12

[Ankit Nautiyal]

For Earlier platforms, the Pipe source size is 12-bits so
max pipe source width and height is 4096. For newer platforms it is
13-bits so theoretically max height is 8192, but maximum width
supported on a single pipe is 5120, beyond which we need to use
bigjoiner.

Currently we are using max scaler source size to make sure that the
pipe source size is programmed within limits, before using scaler.
This creates a problem, for MTL where scaler source size is 4096, but
max pipe source width can be 5120.

Update the check to use the aforementioned limits.

Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal at intel.com>
---
 drivers/gpu/drm/i915/display/skl_scaler.c | 19 +++++++++++++++----
 1 file changed, 15 insertions(+), 4 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/skl_scaler.c b/drivers/gpu/drm/i915/display/skl_scaler.c
index 8a934bada624..36342142efaa 100644
--- a/drivers/gpu/drm/i915/display/skl_scaler.c
+++ b/drivers/gpu/drm/i915/display/skl_scaler.c
@@ -115,6 +115,7 @@ skl_update_scaler(struct intel_crtc_state *crtc_state, bool force_detach,
 	int pipe_src_h = drm_rect_height(&crtc_state->pipe_src);
 	int min_src_w, min_src_h, min_dst_w, min_dst_h;
 	int max_src_w, max_src_h, max_dst_w, max_dst_h;
+	int max_pipe_src_w, max_pipe_src_h;
 
 	/*
 	 * Src coordinates are already rotated by 270 degrees for
@@ -212,11 +213,21 @@ skl_update_scaler(struct intel_crtc_state *crtc_state, bool force_detach,
 	/*
 	 * The pipe scaler does not use all the bits of PIPESRC, at least
 	 * on the earlier platforms. So even when we're scaling a plane
-	 * the *pipe* source size must not be too large. For simplicity
-	 * we assume the limits match the scaler source size limits. Might
-	 * not be 100% accurate on all platforms, but good enough for now.
+	 * the *pipe* source size must not be too large.
+	 *
+	 * For Earlier platforms, the Pipe source size is 12-bits so
+	 * max pipe src width and height is 4096. For newer platforms it is 13-bits.
+	 * Theoretically maximum pipe src height supported on a single pipe is 8192,
+	 * but maximum pipe src width supported on a single pipe is 5120.
 	 */
-	if (pipe_src_w > max_src_w || pipe_src_h > max_src_h) {
+	if (DISPLAY_VER(dev_priv) < 12) {
+		max_pipe_src_w = 4096;
+		max_pipe_src_h = 4096;
+	} else {
+		max_pipe_src_w = 5120;
+		max_pipe_src_h = 8192;
+	}
+	if (pipe_src_w > max_pipe_src_w || pipe_src_h > max_pipe_src_h) {
 		drm_dbg_kms(&dev_priv->drm,
 			    "scaler_user index %u.%u: pipe src size %ux%u "
 			    "is out of scaler range\n",
-- 
2.40.1