[PATCH] drm/i915/display: Allow tighter hblank span
Rodrigo Vivi
rodrigo.vivi at intel.com
Mon Feb 19 20:20:20 UTC 2024
On Sun, Feb 18, 2024 at 07:12:24PM +0100, Bas S wrote:
> I ran into an issue with the i915 driver not being able to drive a display
> with this specific modeline:
Could you please file a bug on this?
https://drm.pages.freedesktop.org/intel-docs/how-to-file-i915-bugs.html
The limits below are per platform/display-architecture and probably forgotten
to get updates for newer platforms. But having more information about your
platform would be very helpful.
Thanks,
Rodrigo.
>
> [drm]] Modeline "1920x720": 60 120980 1920 1932 1936 1948 720 723 733 1035
> 0x48 0x9
> [drm:drm_mode_prune_invalid [drm]] Not using 1920x720 mode: H_ILLEGAL
>
> After some investigation I found that intel_mode_valid (and in newer
> kernels, intel_cpu_transcoder_mode_valid) returns MODE_H_ILLEGAL due to
> (htotal - hdisplay) being lower than 32.
> The modeline in question indeed does not satisfy this constraint, as
> HTOTAL(1948) - HDISPLAY(1920) equals 28.
> Changing the driver code to allow for a hblank span of 28 pixels or lower
> resulted in the driver successfully rendering to the display.
> As such I propose this patch to allow for a tighter hblank span.
>
> Nb: I am uncertain if the hblank span of 32 pixels has been chosen
> deliberately and what the side-effects could be of lowering this value.
> Any insights into this or alternative solutions would be very much
> appreciated! I also considered introducing a kernel module parameter to
> optionally loosen these mode constraints.
>
> The referenced modeline is present in a line of ultrawide signage displays
> and has been known to work on other graphics drivers/OSes.
>
> Signed-off-by: Sebastiaan Schalbroeck <[1]schalbroeck at gmail.com>
> ---
> drivers/gpu/drm/i915/display/intel_display.c | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_display.c
> b/drivers/gpu/drm/i915/display/intel_display.c
> index b10aad1..f6aba1d 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.c
> +++ b/drivers/gpu/drm/i915/display/intel_display.c
> @@ -7745,13 +7745,13 @@ enum drm_mode_status
> intel_cpu_transcoder_mode_valid(struct drm_i915_private *de
> */
> if (DISPLAY_VER(dev_priv) >= 5) {
> if (mode->hdisplay < 64 ||
> - mode->htotal - mode->hdisplay < 32)
> + mode->htotal - mode->hdisplay < 28)
> return MODE_H_ILLEGAL;
>
> if (mode->vtotal - mode->vdisplay < 5)
> return MODE_V_ILLEGAL;
> } else {
> - if (mode->htotal - mode->hdisplay < 32)
> + if (mode->htotal - mode->hdisplay < 28)
> return MODE_H_ILLEGAL;
>
> if (mode->vtotal - mode->vdisplay < 3)
>
> --
> 2.39.2
>
> References
>
> Visible links
> 1. mailto:schalbroeck at gmail.com
More information about the Intel-gfx
mailing list