[PATCH v2 00/21] drm/i915: Add Display Port tunnel BW allocation support
Imre Deak
imre.deak at intel.com
Tue Feb 20 21:18:20 UTC 2024
This is v2 of [1], with the following changes:
- Several functional/typo/formatting fixes, detailed in the patches.
- Move the BW allocation from encoder hooks to
intel_atomic_commit_tail() fixing the allocation for MST streams
enabled/disabled w/o a full modeset (i.e. w/o re-enabling the master
stream).
- Fix an MST mode restore issue during system resume, which also lead
to a tunnel BW allocation failure. (Patch 3)
- Ensure a DPCD DPRX cap read as required by the TBT CM any time a long
HPD pulse is detected. (Patch 20)
- Explicitly disable the BW allocation mode during system suspend.
The patchset is also available at:
https://github.com/ideak/linux/commits/dp_tun_bw_alloc
Cc: Mika Westerberg <mika.westerberg at linux.intel.com>
Cc: Ville Syrjälä <ville.syrjala at linux.intel.com>
Cc: Uma Shankar <uma.shankar at intel.com>
Cc: Jouni Högander <jouni.hogander at intel.com>
Cc: Saranya Gopal <saranya.gopal at intel.com>
Cc: Rajaram Regupathy <rajaram.regupathy at intel.com>
Cc: Gil Fine <gil.fine at intel.com>
Cc: Naama Shachar <naamax.shachar at intel.com>
Cc: Pengfei Xu <pengfei.xu at intel.com>
[1] https://lore.kernel.org/all/20240123102850.390126-1-imre.deak@intel.com
Imre Deak (21):
drm/dp: Add drm_dp_max_dprx_data_rate()
drm/dp: Add support for DP tunneling
drm/i915: Fix display bpp limit computation during system resume
drm/i915/dp: Add support to notify MST connectors to retry modesets
drm/i915/dp: Use drm_dp_max_dprx_data_rate()
drm/i915/dp: Factor out intel_dp_config_required_rate()
drm/i915/dp: Export intel_dp_max_common_rate/lane_count()
drm/i915/dp: Factor out intel_dp_update_sink_caps()
drm/i915/dp: Factor out intel_dp_read_dprx_caps()
drm/i915/dp: Add intel_dp_max_link_data_rate()
drm/i915/dp: Add way to get active pipes with syncing commits
drm/i915/dp: Add support for DP tunnel BW allocation
drm/i915/dp: Add DP tunnel atomic state and check BW limit
drm/i915/dp: Account for tunnel BW limit in
intel_dp_max_link_data_rate()
drm/i915/dp: Compute DP tunnel BW during encoder state computation
drm/i915/dp: Allocate/free DP tunnel BW in the encoder enable/disable
hooks
drm/i915/dp: Handle DP tunnel IRQs
drm/i915/dp: Call intel_dp_sync_state() always for DDI DP encoders
drm/i915/dp: Suspend/resume DP tunnels
drm/i915/dp: Read DPRX for all long HPD pulses
drm/i915/dp: Enable DP tunnel BW allocation mode
drivers/gpu/drm/display/Kconfig | 21 +
drivers/gpu/drm/display/Makefile | 2 +
drivers/gpu/drm/display/drm_dp_helper.c | 30 +
drivers/gpu/drm/display/drm_dp_tunnel.c | 1929 +++++++++++++++++
drivers/gpu/drm/i915/Kconfig | 14 +
drivers/gpu/drm/i915/Kconfig.debug | 1 +
drivers/gpu/drm/i915/Makefile | 3 +
drivers/gpu/drm/i915/display/intel_atomic.c | 10 +
drivers/gpu/drm/i915/display/intel_crtc.c | 52 +
drivers/gpu/drm/i915/display/intel_crtc.h | 2 +
drivers/gpu/drm/i915/display/intel_ddi.c | 3 +-
drivers/gpu/drm/i915/display/intel_display.c | 26 +-
.../gpu/drm/i915/display/intel_display_core.h | 1 +
.../drm/i915/display/intel_display_driver.c | 20 +-
.../drm/i915/display/intel_display_types.h | 9 +
drivers/gpu/drm/i915/display/intel_dp.c | 292 ++-
drivers/gpu/drm/i915/display/intel_dp.h | 13 +-
.../drm/i915/display/intel_dp_link_training.c | 33 +-
.../drm/i915/display/intel_dp_link_training.h | 1 +
drivers/gpu/drm/i915/display/intel_dp_mst.c | 18 +-
.../gpu/drm/i915/display/intel_dp_tunnel.c | 815 +++++++
.../gpu/drm/i915/display/intel_dp_tunnel.h | 133 ++
drivers/gpu/drm/i915/display/intel_link_bw.c | 27 +-
drivers/gpu/drm/i915/display/intel_link_bw.h | 2 +-
drivers/gpu/drm/i915/display/intel_tc.c | 7 +
include/drm/display/drm_dp.h | 61 +
include/drm/display/drm_dp_helper.h | 2 +
include/drm/display/drm_dp_tunnel.h | 248 +++
28 files changed, 3650 insertions(+), 125 deletions(-)
create mode 100644 drivers/gpu/drm/display/drm_dp_tunnel.c
create mode 100644 drivers/gpu/drm/i915/display/intel_dp_tunnel.c
create mode 100644 drivers/gpu/drm/i915/display/intel_dp_tunnel.h
create mode 100644 include/drm/display/drm_dp_tunnel.h
--
2.39.2
More information about the Intel-gfx
mailing list