[PATCH] drm/i915/guc: Correct capture of EIR register on hang
Teres Alexis, Alan Previn
alan.previn.teres.alexis at intel.com
Tue Feb 27 18:54:26 UTC 2024
On Fri, 2024-02-23 at 12:32 -0800, John.C.Harrison at Intel.com wrote:
> From: John Harrison <John.C.Harrison at Intel.com>
alan:snip
> --- a/drivers/gpu/drm/i915/gt/uc/intel_guc_capture.c
> +++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_capture.c
> @@ -51,6 +51,7 @@
> { RING_ESR(0), 0, 0, "ESR" }, \
> { RING_DMA_FADD(0), 0, 0, "RING_DMA_FADD_LDW" },
> \
> { RING_DMA_FADD_UDW(0), 0, 0, "RING_DMA_FADD_UDW" },
> \
> + { RING_EIR(0), 0, 0, "EIR" }, \
> { RING_IPEIR(0), 0, 0, "IPEIR" }, \
> { RING_IPEHR(0), 0, 0, "IPEHR" }, \
> { RING_INSTPS(0), 0, 0, "INSTPS" }, \
> @@ -80,9 +81,6 @@
> { GEN8_RING_PDP_LDW(0, 3), 0, 0, "PDP3_LDW" }, \
> { GEN8_RING_PDP_UDW(0, 3), 0, 0, "PDP3_UDW" }
>
> -#define COMMON_BASE_HAS_EU \
> - { EIR, 0, 0, "EIR" }
> -
alan:snip
alan: Thanks for catching this one.
Reviewed-by: Alan Previn <alan.previn.teres.alexis at intel.com>
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