[PATCH v3 04/16] drm/i915: Bypass LMEMBAR/GTTMMADR for MTL stolen memory access

[Nirmoy Das]

On 1/16/2024 8:56 AM, Ville Syrjala wrote:
> From: Ville Syrjälä<ville.syrjala at linux.intel.com>
>
> On MTL accessing stolen memory via the BARs is somehow borked,
> and it can hang the machine. As a workaround let's bypass the
> BARs and just go straight to DSMBASE/GSMBASE instead.
>
> Note that on every other platform this itself would hang the
> machine, but on MTL the system firmware is expected to relax
> the access permission guarding stolen memory to enable this
> workaround, and thus direct CPU accesses should be fine.
>
> The raw stolen memory areas won't be passed to VMs so we'll
> need to risk using the BAR there for the initial setup. Once
> command submission is up we should switch to MI_UPDATE_GTT
> which at least shouldn't hang the whole machine.
>
> v2: Don't use direct GSM/DSM access on guests
>      Add w/a number
>
> Cc: Paz Zcharya<pazz at chromium.org>
> Cc: Nirmoy Das<nirmoy.das at intel.com>
> Cc: Joonas Lahtinen<joonas.lahtinen at linux.intel.com>
> Reviewed-by: Andrzej Hajda<andrzej.hajda at intel.com>
> Reviewed-by: Radhakrishna Sripada<radhakrishna.sripada at intel.com>
> Signed-off-by: Ville Syrjälä<ville.syrjala at linux.intel.com>

I think i915_run_as_guest() should work.

Reviewed-by: Nirmoy Das <nirmoy.das at intel.com>

> ---
>   drivers/gpu/drm/i915/gem/i915_gem_stolen.c | 14 +++++++++++++-
>   drivers/gpu/drm/i915/gt/intel_ggtt.c       | 16 +++++++++++++++-
>   2 files changed, 28 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/gem/i915_gem_stolen.c b/drivers/gpu/drm/i915/gem/i915_gem_stolen.c
> index ee237043c302..0b429f1ecd99 100644
> --- a/drivers/gpu/drm/i915/gem/i915_gem_stolen.c
> +++ b/drivers/gpu/drm/i915/gem/i915_gem_stolen.c
> @@ -941,7 +941,19 @@ i915_gem_stolen_lmem_setup(struct drm_i915_private *i915, u16 type,
>   		dsm_size = ALIGN_DOWN(lmem_size - dsm_base, SZ_1M);
>   	}
>   
> -	if (pci_resource_len(pdev, GEN12_LMEM_BAR) < lmem_size) {
> +	if (IS_METEORLAKE(i915) && !i915_run_as_guest()) {
> +		/*
> +		 * Wa_22018444074
> +		 *
> +		 * Access via BAR can hang MTL, go directly to DSM,
> +		 * except for VM guests which won't have access to it.
> +		 *
> +		 * Normally this would not work but on MTL the system firmware
> +		 * should have relaxed the access permissions sufficiently.
> +		 */
> +		io_start = intel_uncore_read64(uncore, GEN12_DSMBASE) & GEN12_BDSM_MASK;
> +		io_size = dsm_size;
> +	} else if (pci_resource_len(pdev, GEN12_LMEM_BAR) < lmem_size) {
>   		io_start = 0;
>   		io_size = 0;
>   	} else {
> diff --git a/drivers/gpu/drm/i915/gt/intel_ggtt.c b/drivers/gpu/drm/i915/gt/intel_ggtt.c
> index 21a7e3191c18..7a716ff16070 100644
> --- a/drivers/gpu/drm/i915/gt/intel_ggtt.c
> +++ b/drivers/gpu/drm/i915/gt/intel_ggtt.c
> @@ -24,6 +24,7 @@
>   #include "intel_ring.h"
>   #include "i915_drv.h"
>   #include "i915_pci.h"
> +#include "i915_reg.h"
>   #include "i915_request.h"
>   #include "i915_scatterlist.h"
>   #include "i915_utils.h"
> @@ -1152,13 +1153,26 @@ static unsigned int gen6_gttadr_offset(struct drm_i915_private *i915)
>   static int ggtt_probe_common(struct i915_ggtt *ggtt, u64 size)
>   {
>   	struct drm_i915_private *i915 = ggtt->vm.i915;
> +	struct intel_uncore *uncore = ggtt->vm.gt->uncore;
>   	struct pci_dev *pdev = to_pci_dev(i915->drm.dev);
>   	phys_addr_t phys_addr;
>   	u32 pte_flags;
>   	int ret;
>   
>   	GEM_WARN_ON(pci_resource_len(pdev, GEN4_GTTMMADR_BAR) != gen6_gttmmadr_size(i915));
> -	phys_addr = pci_resource_start(pdev, GEN4_GTTMMADR_BAR) + gen6_gttadr_offset(i915);
> +	/*
> +	 * Wa_22018444074
> +	 *
> +	 * Access via BAR can hang MTL, go directly to GSM,
> +	 * except for VM guests which won't have access to it.
> +	 *
> +	 * Normally this would not work but on MTL the system firmware
> +	 * should have relaxed the access permissions sufficiently.
> +	 */
> +	if (IS_METEORLAKE(i915) && !i915_run_as_guest())
> +		phys_addr = intel_uncore_read64(uncore, GEN12_GSMBASE) & GEN12_BDSM_MASK;
> +	else
> +		phys_addr = pci_resource_start(pdev, GEN4_GTTMMADR_BAR) + gen6_gttadr_offset(i915);
>   
>   	if (needs_wc_ggtt_mapping(i915))
>   		ggtt->gsm = ioremap_wc(phys_addr, size);
-------------- next part --------------
An HTML attachment was scrubbed...
URL: <https://lists.freedesktop.org/archives/intel-gfx/attachments/20240116/aa684b8f/attachment.htm>