[PATCH] drm/i915/psr: Request modeset on initial commit to compute PSR state

[Hogander, Jouni]

On Tue, 2024-01-23 at 10:07 +0200, Ville Syrjälä wrote:
> On Tue, Jan 23, 2024 at 07:57:00AM +0000, Hogander, Jouni wrote:
> > On Tue, 2024-01-23 at 09:41 +0200, Ville Syrjälä wrote:
> > > On Tue, Jan 23, 2024 at 09:11:03AM +0200, Jouni Högander wrote:
> > > > We want to request full modeset in initial fast check to force
> > > > PSR
> > > > state
> > > > computation. Otherwise PSR is not enabled on initial commit but
> > > > on
> > > > first
> > > > commit with modeset or fastset. With this change Initial commit
> > > > will still
> > > > end up using fastset (unless something else requires full
> > > > modeset)
> > > > as PSR
> > > > parameters are not anymore part of intel_pipe_config_compare.
> > > 
> > > I think I'd prefer to go the oppostie direction and try to get
> > > all
> > > the full modeset stuff out from the initial commit. The only
> > > reason
> > > the initial commit was introduced was to compute the plane states
> > > due to lack of readout, and then it got extended due to various
> > > other
> > > hacks. Our goal is to inherit the state from the BIOS so ideally
> > > the whole initial_commit thing wouldn't even exist.
> > 
> > Bios doesn't enable PSR. Do you think this would be better approach
> > ?:
> > 
> > https://patchwork.freedesktop.org/patch/575368/?series=129023&rev=1
> > 
> > What we just need is something triggering intel_psr_compute_config
> > +
> > psr enable. Maybe that could be separate function doing both and
> > call
> > that from intel_initial_commit. If/when we get rid of that
> > intel_initial_commit: this function would be called by that new
> > thing.
> 
> I don't think we should do anything at all. PSR will get enabled by
> the
> first proper commit, if possible.

That means PSR is disabled until there is fastset or full modeset. Is
that ok? I.e. is there some usecase where either of these doesn't
happen?

Panel replay is also now coming to picture as it requires sink side
being enabled before link training. Maybe you have some advice on these
as well:

https://patchwork.freedesktop.org/patch/574966/?series=128156&rev=5
https://patchwork.freedesktop.org/patch/574979/?series=128156&rev=5

BR,

Jouni Högander


> 
> > 
> > BR,
> > 
> > Jouni Högander
> > 
> > > 
> > > > 
> > > > Cc: Stanislav Lisovskiy <stanislav.lisovskiy at intel.com>
> > > > 
> > > > Fixes: a480dd59fe25 ("drm/i915/display: No need for full
> > > > modeset
> > > > due to psr")
> > > > Signed-off-by: Jouni Högander <jouni.hogander at intel.com>
> > > > ---
> > > >  drivers/gpu/drm/i915/display/intel_dp.c  | 8 ++++++++
> > > >  drivers/gpu/drm/i915/display/intel_psr.c | 3 ---
> > > >  drivers/gpu/drm/i915/display/intel_psr.h | 3 +++
> > > >  3 files changed, 11 insertions(+), 3 deletions(-)
> > > > 
> > > > diff --git a/drivers/gpu/drm/i915/display/intel_dp.c
> > > > b/drivers/gpu/drm/i915/display/intel_dp.c
> > > > index ab415f41924d..143981b91e8b 100644
> > > > --- a/drivers/gpu/drm/i915/display/intel_dp.c
> > > > +++ b/drivers/gpu/drm/i915/display/intel_dp.c
> > > > @@ -3326,6 +3326,14 @@ bool
> > > > intel_dp_initial_fastset_check(struct
> > > > intel_encoder *encoder,
> > > >                 fastset = false;
> > > >         }
> > > >  
> > > > +       if (CAN_PSR(intel_dp)) {
> > > > +               drm_dbg_kms(&i915->drm, "[ENCODER:%d:%s]
> > > > Forcing
> > > > full modeset to compute PSR state\
> > > > +n",
> > > > +                           encoder->base.base.id, encoder-
> > > > > base.name);
> > > > +               crtc_state->uapi.mode_changed = true;
> > > > +               fastset = false;
> > > > +       }
> > > > +
> > > >         return fastset;
> > > >  }
> > > >  
> > > > diff --git a/drivers/gpu/drm/i915/display/intel_psr.c
> > > > b/drivers/gpu/drm/i915/display/intel_psr.c
> > > > index 1010b8c405df..b6db7dbfaf1a 100644
> > > > --- a/drivers/gpu/drm/i915/display/intel_psr.c
> > > > +++ b/drivers/gpu/drm/i915/display/intel_psr.c
> > > > @@ -173,9 +173,6 @@
> > > >   * irrelevant for normal operation.
> > > >   */
> > > >  
> > > > -#define CAN_PSR(intel_dp) ((intel_dp)->psr.sink_support && \
> > > > -                          (intel_dp)->psr.source_support)
> > > > -
> > > >  #define CAN_PANEL_REPLAY(intel_dp) ((intel_dp)-
> > > > > psr.sink_panel_replay_support && \
> > > >                                     (intel_dp)-
> > > > > psr.source_panel_replay_support)
> > > >  
> > > > diff --git a/drivers/gpu/drm/i915/display/intel_psr.h
> > > > b/drivers/gpu/drm/i915/display/intel_psr.h
> > > > index cde781df84d5..3d9920ebafab 100644
> > > > --- a/drivers/gpu/drm/i915/display/intel_psr.h
> > > > +++ b/drivers/gpu/drm/i915/display/intel_psr.h
> > > > @@ -21,6 +21,9 @@ struct intel_encoder;
> > > >  struct intel_plane;
> > > >  struct intel_plane_state;
> > > >  
> > > > +#define CAN_PSR(intel_dp) ((intel_dp)->psr.sink_support && \
> > > > +                          (intel_dp)->psr.source_support)
> > > > +
> > > >  bool intel_encoder_can_psr(struct intel_encoder *encoder);
> > > >  void intel_psr_init_dpcd(struct intel_dp *intel_dp);
> > > >  void intel_psr_pre_plane_update(struct intel_atomic_state
> > > > *state,
> > > > -- 
> > > > 2.34.1
> > > 
> > 
>