[PATCH 10/19] drm/i915/dp: Add way to get active pipes with syncing commits

[Imre Deak]

Add a way to get the active pipes through a given DP port by syncing
against a related pending non-blocking commit. Atm
intel_dp_get_active_pipes() will only try to sync a given pipe and if
that would block ignore the pipe. A follow-up change enabling the DP
tunnel BW allocation mode will need to ensure that all active pipes are
returned.

A follow-up patchset will add a no-sync mode as well, needed by the
current intel_tc_port_link_reset() user of it, which atm incorrectly
ignores active pipes for which the syncing would block (but otherwise
doesn't require an actual syncing).

Signed-off-by: Imre Deak <imre.deak at intel.com>
---
 drivers/gpu/drm/i915/display/intel_dp.c | 25 +++++++++++++++++++++----
 drivers/gpu/drm/i915/display/intel_dp.h |  6 ++++++
 drivers/gpu/drm/i915/display/intel_tc.c |  4 +++-
 3 files changed, 30 insertions(+), 5 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
index 9cd675c6d0ee8..323475569ee7f 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -5019,6 +5019,7 @@ static bool intel_dp_has_connector(struct intel_dp *intel_dp,
 
 int intel_dp_get_active_pipes(struct intel_dp *intel_dp,
 			      struct drm_modeset_acquire_ctx *ctx,
+			      enum intel_dp_get_pipes_mode mode,
 			      u8 *pipe_mask)
 {
 	struct drm_i915_private *i915 = dp_to_i915(intel_dp);
@@ -5053,9 +5054,23 @@ int intel_dp_get_active_pipes(struct intel_dp *intel_dp,
 		if (!crtc_state->hw.active)
 			continue;
 
-		if (conn_state->commit &&
-		    !try_wait_for_completion(&conn_state->commit->hw_done))
-			continue;
+		if (conn_state->commit) {
+			bool synced;
+
+			switch (mode) {
+			case INTEL_DP_GET_PIPES_TRY_SYNC:
+				if (!try_wait_for_completion(&conn_state->commit->hw_done))
+					continue;
+				break;
+			case INTEL_DP_GET_PIPES_SYNC:
+				synced = wait_for_completion_timeout(&conn_state->commit->hw_done,
+								     msecs_to_jiffies(5000));
+				drm_WARN_ON(&i915->drm, !synced);
+				break;
+			default:
+				MISSING_CASE(mode);
+			}
+		}
 
 		*pipe_mask |= BIT(crtc->pipe);
 	}
@@ -5092,7 +5107,9 @@ int intel_dp_retrain_link(struct intel_encoder *encoder,
 	if (!intel_dp_needs_link_retrain(intel_dp))
 		return 0;
 
-	ret = intel_dp_get_active_pipes(intel_dp, ctx, &pipe_mask);
+	ret = intel_dp_get_active_pipes(intel_dp, ctx,
+					INTEL_DP_GET_PIPES_TRY_SYNC,
+					&pipe_mask);
 	if (ret)
 		return ret;
 
diff --git a/drivers/gpu/drm/i915/display/intel_dp.h b/drivers/gpu/drm/i915/display/intel_dp.h
index 8b0dfbf06afff..1a7b87787dfa9 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.h
+++ b/drivers/gpu/drm/i915/display/intel_dp.h
@@ -25,6 +25,11 @@ struct intel_encoder;
 
 struct work_struct;
 
+enum intel_dp_get_pipes_mode {
+	INTEL_DP_GET_PIPES_TRY_SYNC,
+	INTEL_DP_GET_PIPES_SYNC,
+};
+
 struct link_config_limits {
 	int min_rate, max_rate;
 	int min_lane_count, max_lane_count;
@@ -59,6 +64,7 @@ int intel_dp_get_link_train_fallback_values(struct intel_dp *intel_dp,
 					    int link_rate, u8 lane_count);
 int intel_dp_get_active_pipes(struct intel_dp *intel_dp,
 			      struct drm_modeset_acquire_ctx *ctx,
+			      enum intel_dp_get_pipes_mode mode,
 			      u8 *pipe_mask);
 int intel_dp_retrain_link(struct intel_encoder *encoder,
 			  struct drm_modeset_acquire_ctx *ctx);
diff --git a/drivers/gpu/drm/i915/display/intel_tc.c b/drivers/gpu/drm/i915/display/intel_tc.c
index f34743e6eeed2..561d6f97ff189 100644
--- a/drivers/gpu/drm/i915/display/intel_tc.c
+++ b/drivers/gpu/drm/i915/display/intel_tc.c
@@ -1655,7 +1655,9 @@ static int reset_link_commit(struct intel_tc_port *tc,
 	if (ret)
 		return ret;
 
-	ret = intel_dp_get_active_pipes(intel_dp, ctx, &pipe_mask);
+	ret = intel_dp_get_active_pipes(intel_dp, ctx,
+					INTEL_DP_GET_PIPES_TRY_SYNC,
+					&pipe_mask);
 	if (ret)
 		return ret;
 
-- 
2.39.2