[PATCH 15/19] drm/i915/dp: Allocate/free DP tunnel BW in the encoder enable/disable hooks

[Imre Deak]

Allocate and free the DP tunnel BW required by a stream while
enabling/disabling the stream during a modeset.

Signed-off-by: Imre Deak <imre.deak at intel.com>
---
 drivers/gpu/drm/i915/display/g4x_dp.c    | 28 ++++++++++++++++++++++++
 drivers/gpu/drm/i915/display/intel_ddi.c |  7 ++++++
 2 files changed, 35 insertions(+)

diff --git a/drivers/gpu/drm/i915/display/g4x_dp.c b/drivers/gpu/drm/i915/display/g4x_dp.c
index dfe0b07a122d1..1e498e1510adf 100644
--- a/drivers/gpu/drm/i915/display/g4x_dp.c
+++ b/drivers/gpu/drm/i915/display/g4x_dp.c
@@ -19,6 +19,7 @@
 #include "intel_dp.h"
 #include "intel_dp_aux.h"
 #include "intel_dp_link_training.h"
+#include "intel_dp_tunnel.h"
 #include "intel_dpio_phy.h"
 #include "intel_fifo_underrun.h"
 #include "intel_hdmi.h"
@@ -729,6 +730,24 @@ static void vlv_enable_dp(struct intel_atomic_state *state,
 	encoder->audio_enable(encoder, pipe_config, conn_state);
 }
 
+static void g4x_dp_pre_pll_enable(struct intel_atomic_state *state,
+				  struct intel_encoder *encoder,
+				  const struct intel_crtc_state *new_crtc_state,
+				  const struct drm_connector_state *new_conn_state)
+{
+	intel_dp_tunnel_atomic_alloc_bw(state, encoder,
+					new_crtc_state, new_conn_state);
+}
+
+static void g4x_dp_post_pll_disable(struct intel_atomic_state *state,
+				    struct intel_encoder *encoder,
+				    const struct intel_crtc_state *old_crtc_state,
+				    const struct drm_connector_state *old_conn_state)
+{
+	intel_dp_tunnel_atomic_free_bw(state, encoder,
+				       old_crtc_state, old_conn_state);
+}
+
 static void g4x_pre_enable_dp(struct intel_atomic_state *state,
 			      struct intel_encoder *encoder,
 			      const struct intel_crtc_state *pipe_config,
@@ -762,6 +781,8 @@ static void vlv_dp_pre_pll_enable(struct intel_atomic_state *state,
 	intel_dp_prepare(encoder, pipe_config);
 
 	vlv_phy_pre_pll_enable(encoder, pipe_config);
+
+	g4x_dp_pre_pll_enable(state, encoder, pipe_config, conn_state);
 }
 
 static void chv_pre_enable_dp(struct intel_atomic_state *state,
@@ -785,6 +806,8 @@ static void chv_dp_pre_pll_enable(struct intel_atomic_state *state,
 	intel_dp_prepare(encoder, pipe_config);
 
 	chv_phy_pre_pll_enable(encoder, pipe_config);
+
+	g4x_dp_pre_pll_enable(state, encoder, pipe_config, conn_state);
 }
 
 static void chv_dp_post_pll_disable(struct intel_atomic_state *state,
@@ -792,6 +815,8 @@ static void chv_dp_post_pll_disable(struct intel_atomic_state *state,
 				    const struct intel_crtc_state *old_crtc_state,
 				    const struct drm_connector_state *old_conn_state)
 {
+	g4x_dp_post_pll_disable(state, encoder, old_crtc_state, old_conn_state);
+
 	chv_phy_post_pll_disable(encoder, old_crtc_state);
 }
 
@@ -1349,11 +1374,14 @@ bool g4x_dp_init(struct drm_i915_private *dev_priv,
 		intel_encoder->enable = vlv_enable_dp;
 		intel_encoder->disable = vlv_disable_dp;
 		intel_encoder->post_disable = vlv_post_disable_dp;
+		intel_encoder->post_pll_disable = g4x_dp_post_pll_disable;
 	} else {
+		intel_encoder->pre_pll_enable = g4x_dp_pre_pll_enable;
 		intel_encoder->pre_enable = g4x_pre_enable_dp;
 		intel_encoder->enable = g4x_enable_dp;
 		intel_encoder->disable = g4x_disable_dp;
 		intel_encoder->post_disable = g4x_post_disable_dp;
+		intel_encoder->post_pll_disable = g4x_dp_post_pll_disable;
 	}
 	intel_encoder->audio_enable = g4x_dp_audio_enable;
 	intel_encoder->audio_disable = g4x_dp_audio_disable;
diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c
index 922194b957be2..aa6e7da08fbce 100644
--- a/drivers/gpu/drm/i915/display/intel_ddi.c
+++ b/drivers/gpu/drm/i915/display/intel_ddi.c
@@ -54,6 +54,7 @@
 #include "intel_dp_aux.h"
 #include "intel_dp_link_training.h"
 #include "intel_dp_mst.h"
+#include "intel_dp_tunnel.h"
 #include "intel_dpio_phy.h"
 #include "intel_dsi.h"
 #include "intel_fdi.h"
@@ -3141,6 +3142,9 @@ static void intel_ddi_post_pll_disable(struct intel_atomic_state *state,
 
 	main_link_aux_power_domain_put(dig_port, old_crtc_state);
 
+	intel_dp_tunnel_atomic_free_bw(state, encoder,
+				       old_crtc_state, old_conn_state);
+
 	if (is_tc_port)
 		intel_tc_port_put_link(dig_port);
 }
@@ -3480,6 +3484,9 @@ intel_ddi_pre_pll_enable(struct intel_atomic_state *state,
 		intel_ddi_update_active_dpll(state, encoder, master_crtc);
 	}
 
+	intel_dp_tunnel_atomic_alloc_bw(state, encoder,
+					crtc_state, conn_state);
+
 	main_link_aux_power_domain_get(dig_port, crtc_state);
 
 	if (is_tc_port && !intel_tc_port_in_tbt_alt_mode(dig_port))
-- 
2.39.2