[PATCH 3/6] drm/i915/adlp: Add DP MST DPT/DPTP alignment WA (Wa_14014143976)

[Nautiyal, Ankit K]

On 1/29/2024 11:25 PM, Imre Deak wrote:
> Add a workaround to fix BS-BS jitter issues on MST links, aligning
> DPT/DPTP MTPs.
>
> Bspec: 50050, 55424
>
> Signed-off-by: Imre Deak <imre.deak at intel.com>


LGTM.

As an aside, with these WAs do we also need to re-visit the transcoder 
Data M and N values.

There is a note too related to WA_14013163432 in intel_dp_mst_compute_m_n.

In any case this is,

Reviewed-by: Ankit Nautiyal <ankit.k.nautiyal at intel.com>


> ---
>   drivers/gpu/drm/i915/display/intel_dp_mst.c | 3 +++
>   drivers/gpu/drm/i915/i915_reg.h             | 1 +
>   2 files changed, 4 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_dp_mst.c b/drivers/gpu/drm/i915/display/intel_dp_mst.c
> index 23f3f7fab9d0b..26c838ac9e411 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp_mst.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp_mst.c
> @@ -1128,6 +1128,9 @@ static void enable_bs_jitter_was(const struct intel_crtc_state *crtc_state)
>   			set |= DP_MST_SHORT_HBLANK_WA(crtc_state->cpu_transcoder);
>   		else if (crtc_state->fec_enable)
>   			clear |= DP_MST_SHORT_HBLANK_WA(crtc_state->cpu_transcoder);
> +
> +		if (crtc_state->fec_enable || intel_dp_is_uhbr(crtc_state))
> +			set |= DP_MST_DPT_DPTP_ALIGN_WA(crtc_state->cpu_transcoder);
>   	}
>   
>   	if (!clear && !set)
> diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
> index 091edc1071e0e..eecbdecb8ed40 100644
> --- a/drivers/gpu/drm/i915/i915_reg.h
> +++ b/drivers/gpu/drm/i915/i915_reg.h
> @@ -4556,6 +4556,7 @@
>   #define   GLK_CL0_PWR_DOWN		REG_BIT(10)
>   
>   #define CHICKEN_MISC_3		_MMIO(0x42088)
> +#define   DP_MST_DPT_DPTP_ALIGN_WA(trans)	REG_BIT(9 + (trans) - TRANSCODER_A)
>   #define   DP_MST_SHORT_HBLANK_WA(trans)		REG_BIT(5 + (trans) - TRANSCODER_A)
>   #define   DP_MST_FEC_BS_JITTER_WA(trans)	REG_BIT(0 + (trans) - TRANSCODER_A)
>