[PATCH] drm/i915: Skip programming FIA link enable bits for MTL+

[Gustavo Sousa]

Applied to drm-intel-next. Thank you all for the feedback and reviews.

--
Gustavo Sousa

Quoting Gustavo Sousa (2024-06-25 17:26:52-03:00)
>Starting with Xe_LPDP, support for Type-C connections is provided by
>PICA and programming PORT_TX_DFLEXDPMLE1(*) registers is not applicable
>anymore. Those registers don't even exist in recent display IPs. As
>such, skip programming them.
>
>Bspec: 65750, 65448
>Signed-off-by: Gustavo Sousa <gustavo.sousa at intel.com>
>---
> drivers/gpu/drm/i915/display/intel_tc.c | 3 +++
> 1 file changed, 3 insertions(+)
>
>diff --git a/drivers/gpu/drm/i915/display/intel_tc.c b/drivers/gpu/drm/i915/display/intel_tc.c
>index 9887967b2ca5..6f2ee7dbc43b 100644
>--- a/drivers/gpu/drm/i915/display/intel_tc.c
>+++ b/drivers/gpu/drm/i915/display/intel_tc.c
>@@ -393,6 +393,9 @@ void intel_tc_port_set_fia_lane_count(struct intel_digital_port *dig_port,
>         bool lane_reversal = dig_port->saved_port_bits & DDI_BUF_PORT_REVERSAL;
>         u32 val;
> 
>+        if (DISPLAY_VER(i915) >= 14)
>+                return;
>+
>         drm_WARN_ON(&i915->drm,
>                     lane_reversal && tc->mode != TC_PORT_LEGACY);
> 
>-- 
>2.45.2
>