[PATCH v2 1/1] drm/i915/display: Cache adpative sync caps to use it later

[Murthy, Arun R]

> -----Original Message-----
> From: Intel-gfx <intel-gfx-bounces at lists.freedesktop.org> On Behalf Of Mitul
> Golani
> Sent: Thursday, July 4, 2024 1:57 PM
> To: intel-gfx at lists.freedesktop.org
> Cc: Nautiyal, Ankit K <ankit.k.nautiyal at intel.com>; Deak, Imre
> <imre.deak at intel.com>; Nikula, Jani <jani.nikula at intel.com>
> Subject: [PATCH v2 1/1] drm/i915/display: Cache adpative sync caps to use it
> later
> 
> Add new member to struct intel_dp to cache support of Adaptive Sync SDP
> capabilities and use it whenever required to avoid HW access to read capability
> during each atomic commit.
> 
> -v2:
> - Squash both the patches
> 
> Signed-off-by: Mitul Golani <mitulkumar.ajitkumar.golani at intel.com>

Reviewed-by: Arun R Murthy <arun.r.murthy at intel.com>

Thanks and Regards,
Arun R Murthy
--------------------
> ---
>  drivers/gpu/drm/i915/display/intel_alpm.c     |  2 +-
>  .../drm/i915/display/intel_display_types.h    |  1 +
>  drivers/gpu/drm/i915/display/intel_dp.c       | 22 ++++++++++---------
>  drivers/gpu/drm/i915/display/intel_dp.h       |  1 -
>  drivers/gpu/drm/i915/display/intel_vrr.c      |  3 +--
>  5 files changed, 15 insertions(+), 14 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_alpm.c
> b/drivers/gpu/drm/i915/display/intel_alpm.c
> index 866b3b409c4d..f4f05a859379 100644
> --- a/drivers/gpu/drm/i915/display/intel_alpm.c
> +++ b/drivers/gpu/drm/i915/display/intel_alpm.c
> @@ -280,7 +280,7 @@ void intel_alpm_lobf_compute_config(struct intel_dp
> *intel_dp,
>  	if (DISPLAY_VER(i915) < 20)
>  		return;
> 
> -	if (!intel_dp_as_sdp_supported(intel_dp))
> +	if (!intel_dp->as_sdp_supported)
>  		return;
> 
>  	if (crtc_state->has_psr)
> diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h
> b/drivers/gpu/drm/i915/display/intel_display_types.h
> index 8713835e2307..a9d2acdc51a4 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_types.h
> +++ b/drivers/gpu/drm/i915/display/intel_display_types.h
> @@ -1806,6 +1806,7 @@ struct intel_dp {
> 
>  	/* connector directly attached - won't be use for modeset in mst world
> */
>  	struct intel_connector *attached_connector;
> +	bool as_sdp_supported;
> 
>  	struct drm_dp_tunnel *tunnel;
>  	bool tunnel_suspended:1;
> diff --git a/drivers/gpu/drm/i915/display/intel_dp.c
> b/drivers/gpu/drm/i915/display/intel_dp.c
> index 3903f6ead6e6..edfb30857479 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp.c
> @@ -129,14 +129,6 @@ bool intel_dp_is_edp(struct intel_dp *intel_dp)
>  	return dig_port->base.type == INTEL_OUTPUT_EDP;  }
> 
> -bool intel_dp_as_sdp_supported(struct intel_dp *intel_dp) -{
> -	struct drm_i915_private *i915 = dp_to_i915(intel_dp);
> -
> -	return HAS_AS_SDP(i915) &&
> -		drm_dp_as_sdp_supported(&intel_dp->aux, intel_dp->dpcd);
> -}
> -
>  static void intel_dp_unset_edid(struct intel_dp *intel_dp);
> 
>  /* Is link rate UHBR and thus 128b/132b? */ @@ -2625,8 +2617,7 @@ static
> void intel_dp_compute_as_sdp(struct intel_dp *intel_dp,
>  	const struct drm_display_mode *adjusted_mode =
>  		&crtc_state->hw.adjusted_mode;
> 
> -	if (!crtc_state->vrr.enable ||
> -	    !intel_dp_as_sdp_supported(intel_dp))
> +	if (!crtc_state->vrr.enable || intel_dp->as_sdp_supported)
>  		return;
> 
>  	crtc_state->infoframes.enable |=
> intel_hdmi_infoframe_enable(DP_SDP_ADAPTIVE_SYNC);
> @@ -5900,6 +5891,15 @@ intel_dp_detect_dsc_caps(struct intel_dp *intel_dp,
> struct intel_connector *conn
>  					  connector);
>  }
> 
> +static void
> +intel_dp_detect_sdp_caps(struct intel_dp *intel_dp) {
> +	struct drm_i915_private *i915 = dp_to_i915(intel_dp);
> +
> +	intel_dp->as_sdp_supported = HAS_AS_SDP(i915) &&
> +		drm_dp_as_sdp_supported(&intel_dp->aux, intel_dp->dpcd); }
> +
>  static int
>  intel_dp_detect(struct drm_connector *connector,
>  		struct drm_modeset_acquire_ctx *ctx,
> @@ -5958,6 +5958,8 @@ intel_dp_detect(struct drm_connector *connector,
> 
>  	intel_dp_detect_dsc_caps(intel_dp, intel_connector);
> 
> +	intel_dp_detect_sdp_caps(intel_dp);
> +
>  	intel_dp_mst_configure(intel_dp);
> 
>  	if (intel_dp->reset_link_params) {
> diff --git a/drivers/gpu/drm/i915/display/intel_dp.h
> b/drivers/gpu/drm/i915/display/intel_dp.h
> index a0f990a95ecc..9be539edf817 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp.h
> +++ b/drivers/gpu/drm/i915/display/intel_dp.h
> @@ -85,7 +85,6 @@ void intel_dp_audio_compute_config(struct intel_encoder
> *encoder,
>  				   struct drm_connector_state *conn_state);
> bool intel_dp_has_hdmi_sink(struct intel_dp *intel_dp);  bool
> intel_dp_is_edp(struct intel_dp *intel_dp); -bool
> intel_dp_as_sdp_supported(struct intel_dp *intel_dp);  bool
> intel_dp_is_uhbr(const struct intel_crtc_state *crtc_state);  bool
> intel_dp_has_dsc(const struct intel_connector *connector);  int
> intel_dp_link_symbol_size(int rate); diff --git
> a/drivers/gpu/drm/i915/display/intel_vrr.c
> b/drivers/gpu/drm/i915/display/intel_vrr.c
> index 5a0da64c7db3..7e1d9c718214 100644
> --- a/drivers/gpu/drm/i915/display/intel_vrr.c
> +++ b/drivers/gpu/drm/i915/display/intel_vrr.c
> @@ -233,8 +233,7 @@ intel_vrr_compute_config(struct intel_crtc_state
> *crtc_state,
>  		crtc_state->mode_flags |= I915_MODE_FLAG_VRR;
>  	}
> 
> -	if (intel_dp_as_sdp_supported(intel_dp) &&
> -	    crtc_state->vrr.enable) {
> +	if (intel_dp->as_sdp_supported && crtc_state->vrr.enable) {
>  		crtc_state->vrr.vsync_start =
>  			(crtc_state->hw.adjusted_mode.crtc_vtotal -
>  			 crtc_state->hw.adjusted_mode.vsync_start);
> --
> 2.45.2