✗ Fi.CI.CHECKPATCH: warning for Implement CMRR Support (rev13)
Patchwork
patchwork at emeril.freedesktop.org
Wed Jun 5 17:58:22 UTC 2024
== Series Details ==
Series: Implement CMRR Support (rev13)
URL : https://patchwork.freedesktop.org/series/126443/
State : warning
== Summary ==
Error: dim checkpatch failed
71b880e0125f gpu/drm/i915: Update indentation for VRR registers and bits
00df34d55970 drm/i915: Separate VRR related register definitions
-:24: WARNING:FILE_PATH_CHANGES: added, moved or deleted file(s), does MAINTAINERS need updating?
#24:
new file mode 100644
total: 0 errors, 1 warnings, 0 checks, 226 lines checked
c378b46201ff drm/i915: Define and compute Transcoder CMRR registers
-:58: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'name' - possible side-effects?
#58: FILE: drivers/gpu/drm/i915/display/intel_display.c:5064:
+#define PIPE_CONF_CHECK_LLI(name) do { \
+ if (current_config->name != pipe_config->name) { \
+ pipe_config_mismatch(&p, fastset, crtc, __stringify(name), \
+ "(expected %lli, found %lli)", \
+ current_config->name, \
+ pipe_config->name); \
+ ret = false; \
+ } \
+} while (0)
-:58: CHECK:MACRO_ARG_PRECEDENCE: Macro argument 'name' may be better as '(name)' to avoid precedence issues
#58: FILE: drivers/gpu/drm/i915/display/intel_display.c:5064:
+#define PIPE_CONF_CHECK_LLI(name) do { \
+ if (current_config->name != pipe_config->name) { \
+ pipe_config_mismatch(&p, fastset, crtc, __stringify(name), \
+ "(expected %lli, found %lli)", \
+ current_config->name, \
+ pipe_config->name); \
+ ret = false; \
+ } \
+} while (0)
total: 0 errors, 0 warnings, 2 checks, 113 lines checked
f1b4f9a44c61 drm/i915: Update trans_vrr_ctl flag when cmrr is computed
4e00c44f77da drm/dp: Add refresh rate divider to struct representing AS SDP
3c724ca659bc drm/i915/display: Add support for pack and unpack
0420415fbabf drm/i915/display: Compute Adaptive sync SDP params
9aa2b2a078df drm/i915/display: Compute vrr vsync params
749400a8261e drm/i915: Compute CMRR and calculate vtotal
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