[PATCH 1/4] drm/i915/dsb: Polish the DSB ID enum

Manna, Animesh animesh.manna at intel.com
Thu Jun 6 18:57:55 UTC 2024



> -----Original Message-----
> From: Intel-gfx <intel-gfx-bounces at lists.freedesktop.org> On Behalf Of Ville
> Syrjala
> Sent: Friday, May 31, 2024 5:11 PM
> To: intel-gfx at lists.freedesktop.org
> Subject: [PATCH 1/4] drm/i915/dsb: Polish the DSB ID enum
> 
> From: Ville Syrjälä <ville.syrjala at linux.intel.com>
> 
> Namespace the DSB ID enum properly, and make the naming match other
> such enums in general. Also make the names 0 based as that's what Bspec
> uses for DSB (unlike eg. planes where it uses 1 based indexing).
> 
> We'll throw out INVALID_DSB while at it since we have no use for it at the
> moment.
> 
> Signed-off-by: Ville Syrjälä <ville.syrjala at linux.intel.com>

LGTM.
Reviewed-by: Animesh Manna <animesh.manna at intel.com>
 
> ---
>  drivers/gpu/drm/i915/display/intel_dsb.c | 22 +++++++++++-----------
>  1 file changed, 11 insertions(+), 11 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_dsb.c
> b/drivers/gpu/drm/i915/display/intel_dsb.c
> index 319fbebd7008..0e2bd9a2f9da 100644
> --- a/drivers/gpu/drm/i915/display/intel_dsb.c
> +++ b/drivers/gpu/drm/i915/display/intel_dsb.c
> @@ -19,16 +19,16 @@
> 
>  #define CACHELINE_BYTES 64
> 
> -enum dsb_id {
> -	INVALID_DSB = -1,
> -	DSB1,
> -	DSB2,
> -	DSB3,
> -	MAX_DSB_PER_PIPE
> +enum intel_dsb_id {
> +	INTEL_DSB_0,
> +	INTEL_DSB_1,
> +	INTEL_DSB_2,
> +
> +	I915_MAX_DSBS,
>  };
> 
>  struct intel_dsb {
> -	enum dsb_id id;
> +	enum intel_dsb_id id;
> 
>  	struct intel_dsb_buffer dsb_buf;
>  	struct intel_crtc *crtc;
> @@ -121,9 +121,9 @@ static void intel_dsb_dump(struct intel_dsb *dsb)  }
> 
>  static bool is_dsb_busy(struct drm_i915_private *i915, enum pipe pipe,
> -			enum dsb_id id)
> +			enum intel_dsb_id dsb_id)
>  {
> -	return intel_de_read_fw(i915, DSB_CTRL(pipe, id)) &
> DSB_STATUS_BUSY;
> +	return intel_de_read_fw(i915, DSB_CTRL(pipe, dsb_id)) &
> +DSB_STATUS_BUSY;
>  }
> 
>  static void intel_dsb_emit(struct intel_dsb *dsb, u32 ldw, u32 udw) @@ -
> 482,7 +482,7 @@ struct intel_dsb *intel_dsb_prepare(const struct
> intel_crtc_state *crtc_state,
> 
>  	intel_runtime_pm_put(&i915->runtime_pm, wakeref);
> 
> -	dsb->id = DSB1;
> +	dsb->id = INTEL_DSB_0;
>  	dsb->crtc = crtc;
>  	dsb->size = size / 4; /* in dwords */
>  	dsb->free_pos = 0;
> @@ -497,7 +497,7 @@ struct intel_dsb *intel_dsb_prepare(const struct
> intel_crtc_state *crtc_state,
>  out:
>  	drm_info_once(&i915->drm,
>  		      "[CRTC:%d:%s] DSB %d queue setup failed, will fallback to
> MMIO for display HW programming\n",
> -		      crtc->base.base.id, crtc->base.name, DSB1);
> +		      crtc->base.base.id, crtc->base.name, INTEL_DSB_0);
> 
>  	return NULL;
>  }
> --
> 2.44.1



More information about the Intel-gfx mailing list