✗ Fi.CI.CHECKPATCH: warning for Implement CMRR Support (rev15)

[Patchwork]

== Series Details ==

Series: Implement CMRR Support (rev15)
URL   : https://patchwork.freedesktop.org/series/126443/
State : warning

== Summary ==

Error: dim checkpatch failed
a94b95950af9 gpu/drm/i915: Update indentation for VRR registers and bits
-:57: WARNING:LONG_LINE: line length of 101 exceeds 100 columns
#57: FILE: drivers/gpu/drm/i915/i915_reg.h:1164:
+#define	 XELPD_VRR_CTL_VRR_GUARDBAND(x)		REG_FIELD_PREP(XELPD_VRR_CTL_VRR_GUARDBAND_MASK, (x))

total: 0 errors, 1 warnings, 0 checks, 197 lines checked
dc77f36f8936 drm/i915: Separate VRR related register definitions
-:24: WARNING:FILE_PATH_CHANGES: added, moved or deleted file(s), does MAINTAINERS need updating?
#24: 
new file mode 100644

-:53: WARNING:LONG_LINE: line length of 101 exceeds 100 columns
#53: FILE: drivers/gpu/drm/i915/display/intel_vrr_regs.h:25:
+#define  XELPD_VRR_CTL_VRR_GUARDBAND(x)		REG_FIELD_PREP(XELPD_VRR_CTL_VRR_GUARDBAND_MASK, (x))

total: 0 errors, 2 warnings, 0 checks, 230 lines checked
5b266ed2d6a6 drm/i915: Define and compute Transcoder CMRR registers
-:58: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'name' - possible side-effects?
#58: FILE: drivers/gpu/drm/i915/display/intel_display.c:5088:
+#define PIPE_CONF_CHECK_LLI(name) do { \
+	if (current_config->name != pipe_config->name) { \
+		pipe_config_mismatch(&p, fastset, crtc, __stringify(name), \
+				     "(expected %lli, found %lli)", \
+				     current_config->name, \
+				     pipe_config->name); \
+		ret = false; \
+	} \
+} while (0)

-:58: CHECK:MACRO_ARG_PRECEDENCE: Macro argument 'name' may be better as '(name)' to avoid precedence issues
#58: FILE: drivers/gpu/drm/i915/display/intel_display.c:5088:
+#define PIPE_CONF_CHECK_LLI(name) do { \
+	if (current_config->name != pipe_config->name) { \
+		pipe_config_mismatch(&p, fastset, crtc, __stringify(name), \
+				     "(expected %lli, found %lli)", \
+				     current_config->name, \
+				     pipe_config->name); \
+		ret = false; \
+	} \
+} while (0)

total: 0 errors, 0 warnings, 2 checks, 113 lines checked
229bc1240452 drm/i915: Update trans_vrr_ctl flag when cmrr is computed
0c8c4a0a0273 drm/dp: Add refresh rate divider to struct representing AS SDP
decd179d0ab4 drm/i915/display: Add support for pack and unpack
d1b357f0c27a drm/i915/display: Compute Adaptive sync SDP params
864c98591ae3 drm/i915/display: Compute vrr vsync params
d1040a5c026e drm/i915: Compute CMRR and calculate vtotal