[PATCH v15 9/9] drm/i915/display: Read/Write AS sdp only when sink/source has enabled
Nautiyal, Ankit K
ankit.k.nautiyal at intel.com
Mon Mar 4 10:57:39 UTC 2024
On 3/1/2024 2:15 PM, Mitul Golani wrote:
> Write/Read Adaptive sync SDP only when Sink and Source is enabled
> for the same. Also along with write TRANS_VRR_VSYNC values.
The subject line and commit message need to be updated.
Now we are just enabling Adaptive sync SDP.
Regards,
Ankit
>
> Signed-off-by: Mitul Golani <mitulkumar.ajitkumar.golani at intel.com>
> ---
> drivers/gpu/drm/i915/display/intel_ddi.c | 1 +
> drivers/gpu/drm/i915/display/intel_dp.c | 1 +
> 2 files changed, 2 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c
> index c587a8efeafc..f164020a4773 100644
> --- a/drivers/gpu/drm/i915/display/intel_ddi.c
> +++ b/drivers/gpu/drm/i915/display/intel_ddi.c
> @@ -3972,6 +3972,7 @@ static void intel_ddi_get_config(struct intel_encoder *encoder,
>
> intel_read_dp_sdp(encoder, pipe_config, HDMI_PACKET_TYPE_GAMUT_METADATA);
> intel_read_dp_sdp(encoder, pipe_config, DP_SDP_VSC);
> + intel_read_dp_sdp(encoder, pipe_config, DP_SDP_ADAPTIVE_SYNC);
>
> intel_audio_codec_get_config(encoder, pipe_config);
> }
> diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
> index ef1543205ee9..9abe245ac1ee 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp.c
> @@ -4332,6 +4332,7 @@ void intel_dp_set_infoframes(struct intel_encoder *encoder,
> return;
>
> intel_write_dp_sdp(encoder, crtc_state, DP_SDP_VSC);
> + intel_write_dp_sdp(encoder, crtc_state, DP_SDP_ADAPTIVE_SYNC);
>
> intel_write_dp_sdp(encoder, crtc_state, HDMI_PACKET_TYPE_GAMUT_METADATA);
> }
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