[RFC 2/3] drm/i915/alpm: Add compute config for lobf

[Manna, Animesh]

> -----Original Message-----
> From: Jani Nikula <jani.nikula at linux.intel.com>
> Sent: Monday, March 4, 2024 11:03 PM
> To: Manna, Animesh <animesh.manna at intel.com>; intel-
> gfx at lists.freedesktop.org
> Cc: Hogander, Jouni <jouni.hogander at intel.com>; Murthy, Arun R
> <arun.r.murthy at intel.com>; Manna, Animesh <animesh.manna at intel.com>
> Subject: Re: [RFC 2/3] drm/i915/alpm: Add compute config for lobf
> 
> On Mon, 04 Mar 2024, Animesh Manna <animesh.manna at intel.com>
> wrote:
> > Link Off Between Active Frames, is a new feature for eDP that allows
> > the panel to go to lower power state after transmission of data. This
> > is a feature on top of ALPM, AS SDP.
> > Add compute config during atomic-check phase.
> >
> > Signed-off-by: Animesh Manna <animesh.manna at intel.com>
> > ---
> >  .../drm/i915/display/intel_display_types.h    |  3 ++
> >  drivers/gpu/drm/i915/display/intel_dp.c       |  1 +
> >  drivers/gpu/drm/i915/display/intel_psr.c      | 45 +++++++++++++++++++
> >  drivers/gpu/drm/i915/display/intel_psr.h      |  3 ++
> >  4 files changed, 52 insertions(+)
> >
> > diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h
> > b/drivers/gpu/drm/i915/display/intel_display_types.h
> > index d473d8dca90a..4d2161eeb686 100644
> > --- a/drivers/gpu/drm/i915/display/intel_display_types.h
> > +++ b/drivers/gpu/drm/i915/display/intel_display_types.h
> > @@ -1851,6 +1851,9 @@ struct intel_dp {
> >  		u8 silence_period_sym_clocks;
> >  		u8 lfps_half_cycle_num_of_syms;
> >  	} alpm_parameters;
> > +
> > +	/* LOBF flags*/
> > +	bool lobf_supported;
> >  };
> >
> >  enum lspcon_vendor {
> > diff --git a/drivers/gpu/drm/i915/display/intel_dp.c
> > b/drivers/gpu/drm/i915/display/intel_dp.c
> > index 8304ef912767..e34b70d88b9a 100644
> > --- a/drivers/gpu/drm/i915/display/intel_dp.c
> > +++ b/drivers/gpu/drm/i915/display/intel_dp.c
> > @@ -2979,6 +2979,7 @@ intel_dp_compute_config(struct intel_encoder
> *encoder,
> >  	intel_vrr_compute_config(pipe_config, conn_state);
> >  	intel_dp_compute_as_sdp(intel_dp, pipe_config, conn_state);
> >  	intel_psr_compute_config(intel_dp, pipe_config, conn_state);
> > +	intel_psr_lobf_compute_config(intel_dp, pipe_config, conn_state);
> >  	intel_dp_drrs_compute_config(connector, pipe_config,
> link_bpp_x16);
> >  	intel_dp_compute_vsc_sdp(intel_dp, pipe_config, conn_state);
> >  	intel_dp_compute_hdr_metadata_infoframe_sdp(intel_dp,
> pipe_config,
> > conn_state); diff --git a/drivers/gpu/drm/i915/display/intel_psr.c
> > b/drivers/gpu/drm/i915/display/intel_psr.c
> > index 4adcddba69c1..c08bffc2921a 100644
> > --- a/drivers/gpu/drm/i915/display/intel_psr.c
> > +++ b/drivers/gpu/drm/i915/display/intel_psr.c
> > @@ -436,6 +436,16 @@ static bool intel_dp_get_alpm_status(struct
> intel_dp *intel_dp)
> >  	return alpm_caps & DP_ALPM_CAP;
> >  }
> >
> > +static bool intel_dp_get_aux_less_alpm_status(struct intel_dp
> > +*intel_dp) {
> > +	u8 alpm_caps = 0;
> > +
> > +	if (drm_dp_dpcd_readb(&intel_dp->aux, DP_RECEIVER_ALPM_CAP,
> > +			      &alpm_caps) != 1)
> 
> The compute config path must not access the hardware.

Sure, will put in init_connector() and store in a variable.

Regards,
Animesh

> 
> BR,
> Jani.
> 
> > +		return false;
> > +	return alpm_caps & DP_ALPM_AUX_LESS_CAP; }
> > +
> >  static u8 intel_dp_get_sink_sync_latency(struct intel_dp *intel_dp)
> > {
> >  	struct drm_i915_private *i915 = dp_to_i915(intel_dp); @@ -1569,6
> > +1579,41 @@ void intel_psr_compute_config(struct intel_dp *intel_dp,
> >  	crtc_state->has_psr2 = intel_psr2_config_valid(intel_dp,
> > crtc_state);  }
> >
> > +void intel_psr_lobf_compute_config(struct intel_dp *intel_dp,
> > +			       struct intel_crtc_state *crtc_state,
> > +			       struct drm_connector_state *conn_state) {
> > +	struct drm_display_mode *adjusted_mode = &crtc_state-
> >hw.adjusted_mode;
> > +	int waketime_in_lines, first_sdp_position;
> > +	int context_latency, guardband;
> > +	bool auxless_alpm;
> > +
> > +	intel_dp->lobf_supported = false;
> > +
> > +	if (!intel_dp_is_edp(intel_dp))
> > +		return;
> > +
> > +	if (!intel_dp_as_sdp_supported(intel_dp))
> > +		return;
> > +
> > +	if (CAN_PSR(intel_dp) || CAN_PANEL_REPLAY(intel_dp))
> > +		return;
> > +
> > +	if (_compute_alpm_params(intel_dp, crtc_state)) {
> > +		context_latency = adjusted_mode->crtc_vblank_start -
> adjusted_mode->crtc_vdisplay;
> > +		guardband = adjusted_mode->crtc_vtotal - adjusted_mode-
> >crtc_vdisplay - context_latency;
> > +		first_sdp_position = adjusted_mode->crtc_vtotal -
> adjusted_mode->crtc_vsync_start;
> > +		auxless_alpm =
> intel_dp_get_aux_less_alpm_status(intel_dp);
> > +		if (auxless_alpm)
> > +			waketime_in_lines = intel_dp-
> >alpm_parameters.io_wake_lines;
> > +		else
> > +			waketime_in_lines = intel_dp-
> >alpm_parameters.aux_less_wake_lines;
> > +
> > +		if ((context_latency + guardband) > (first_sdp_position +
> waketime_in_lines))
> > +			intel_dp->lobf_supported = true;
> > +	}
> > +}
> > +
> >  void intel_psr_get_config(struct intel_encoder *encoder,
> >  			  struct intel_crtc_state *pipe_config)  { diff --git
> > a/drivers/gpu/drm/i915/display/intel_psr.h
> > b/drivers/gpu/drm/i915/display/intel_psr.h
> > index cde781df84d5..4bb77295288f 100644
> > --- a/drivers/gpu/drm/i915/display/intel_psr.h
> > +++ b/drivers/gpu/drm/i915/display/intel_psr.h
> > @@ -40,6 +40,9 @@ void intel_psr_init(struct intel_dp *intel_dp);
> > void intel_psr_compute_config(struct intel_dp *intel_dp,
> >  			      struct intel_crtc_state *crtc_state,
> >  			      struct drm_connector_state *conn_state);
> > +void intel_psr_lobf_compute_config(struct intel_dp *intel_dp,
> > +				   struct intel_crtc_state *crtc_state,
> > +				   struct drm_connector_state *conn_state);
> >  void intel_psr_get_config(struct intel_encoder *encoder,
> >  			  struct intel_crtc_state *pipe_config);  void
> > intel_psr_irq_handler(struct intel_dp *intel_dp, u32 psr_iir);
> 
> --
> Jani Nikula, Intel