[PATCH 2/2] drm/i915/display: prefer intel_de_wait*() functions over uncore ones
Gustavo Sousa
gustavo.sousa at intel.com
Mon Mar 25 23:06:31 UTC 2024
Quoting Jani Nikula (2024-03-20 13:01:23-03:00)
>Prefer the intel_de_wait*() functions over the uncore interface.
>
>Signed-off-by: Jani Nikula <jani.nikula at intel.com>
Reviewed-by: Gustavo Sousa <gustavo.sousa at intel.com>
>---
> drivers/gpu/drm/i915/display/intel_dpio_phy.c | 7 ++-----
> drivers/gpu/drm/i915/display/intel_hdcp.c | 6 +++---
> 2 files changed, 5 insertions(+), 8 deletions(-)
>
>diff --git a/drivers/gpu/drm/i915/display/intel_dpio_phy.c b/drivers/gpu/drm/i915/display/intel_dpio_phy.c
>index 4ca910874a4f..2d7a71c8c69c 100644
>--- a/drivers/gpu/drm/i915/display/intel_dpio_phy.c
>+++ b/drivers/gpu/drm/i915/display/intel_dpio_phy.c
>@@ -399,11 +399,8 @@ static void _bxt_ddi_phy_init(struct drm_i915_private *dev_priv,
> * The flag should get set in 100us according to the HW team, but
> * use 1ms due to occasional timeouts observed with that.
> */
>- if (intel_wait_for_register_fw(&dev_priv->uncore,
>- BXT_PORT_CL1CM_DW0(phy),
>- PHY_RESERVED | PHY_POWER_GOOD,
>- PHY_POWER_GOOD,
>- 1))
>+ if (intel_de_wait_fw(dev_priv, BXT_PORT_CL1CM_DW0(phy),
>+ PHY_RESERVED | PHY_POWER_GOOD, PHY_POWER_GOOD, 1))
> drm_err(&dev_priv->drm, "timeout during PHY%d power on\n",
> phy);
>
>diff --git a/drivers/gpu/drm/i915/display/intel_hdcp.c b/drivers/gpu/drm/i915/display/intel_hdcp.c
>index 9edac27bab26..d5ed4c7dfbc0 100644
>--- a/drivers/gpu/drm/i915/display/intel_hdcp.c
>+++ b/drivers/gpu/drm/i915/display/intel_hdcp.c
>@@ -369,9 +369,9 @@ static int intel_hdcp_load_keys(struct drm_i915_private *i915)
> }
>
> /* Wait for the keys to load (500us) */
>- ret = __intel_wait_for_register(&i915->uncore, HDCP_KEY_STATUS,
>- HDCP_KEY_LOAD_DONE, HDCP_KEY_LOAD_DONE,
>- 10, 1, &val);
>+ ret = intel_de_wait_custom(i915, HDCP_KEY_STATUS,
>+ HDCP_KEY_LOAD_DONE, HDCP_KEY_LOAD_DONE,
>+ 10, 1, &val);
> if (ret)
> return ret;
> else if (!(val & HDCP_KEY_LOAD_STATUS))
>--
>2.39.2
>
More information about the Intel-gfx
mailing list