[PATCH] drm/i915/gem: Calculate object page offset for partial memory mapping
Andi Shyti
andi.shyti at linux.intel.com
Tue Mar 26 11:12:53 UTC 2024
Hi Nirmoy,
...
> > diff --git a/drivers/gpu/drm/i915/gem/i915_gem_mman.c b/drivers/gpu/drm/i915/gem/i915_gem_mman.c
> > index a2195e28b625..57a2dda2c3cc 100644
> > --- a/drivers/gpu/drm/i915/gem/i915_gem_mman.c
> > +++ b/drivers/gpu/drm/i915/gem/i915_gem_mman.c
> > @@ -276,7 +276,7 @@ static vm_fault_t vm_fault_cpu(struct vm_fault *vmf)
> > /* PTEs are revoked in obj->ops->put_pages() */
> > err = remap_io_sg(area,
> > area->vm_start, area->vm_end - area->vm_start,
> > - obj->mm.pages->sgl, iomap);
> > + obj->mm.pages->sgl, 0, iomap);
>
> Why don't we need partial mmap for CPU but only for GTT ?
As far as I understood we don't. I have a version with the CPU
offset as well in trybot[*]
But without support for segmented buffer objects, I don't know
how much this has any effect.
> Sounds like this also need to be cover by a IGT tests.
Yes, I it does need some igt work, working on it.
> Don't we need "Fixes" tag for this?
Why should we? I'm not fixing anything here, I'm just
recalculating the mapping not starting from the beginning of the
scatter page.
Andi
[*] https://patchwork.freedesktop.org/patch/584474/?series=131539&rev=2
More information about the Intel-gfx
mailing list