[PATCH 09/16] drm/i915: Drop useless PLANE_FOO_3 register defines
Jani Nikula
jani.nikula at linux.intel.com
Mon May 13 10:32:42 UTC 2024
On Fri, 10 May 2024, Ville Syrjala <ville.syrjala at linux.intel.com> wrote:
> From: Ville Syrjälä <ville.syrjala at linux.intel.com>
>
> We only need register defines for the first two planes
> on the first two pipes. Nuke everything else.
>
> Signed-off-by: Ville Syrjälä <ville.syrjala at linux.intel.com>
Reviewed-by: Jani Nikula <jani.nikula at intel.com>
> ---
> .../gpu/drm/i915/display/skl_universal_plane_regs.h | 12 ------------
> 1 file changed, 12 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/skl_universal_plane_regs.h b/drivers/gpu/drm/i915/display/skl_universal_plane_regs.h
> index 2222d0c760e8..0558d97614e1 100644
> --- a/drivers/gpu/drm/i915/display/skl_universal_plane_regs.h
> +++ b/drivers/gpu/drm/i915/display/skl_universal_plane_regs.h
> @@ -234,49 +234,38 @@
>
> #define _PLANE_CTL_1_B 0x71180
> #define _PLANE_CTL_2_B 0x71280
> -#define _PLANE_CTL_3_B 0x71380
> #define _PLANE_CTL_1(pipe) _PIPE(pipe, _PLANE_CTL_1_A, _PLANE_CTL_1_B)
> #define _PLANE_CTL_2(pipe) _PIPE(pipe, _PLANE_CTL_2_A, _PLANE_CTL_2_B)
> -#define _PLANE_CTL_3(pipe) _PIPE(pipe, _PLANE_CTL_3_A, _PLANE_CTL_3_B)
> #define PLANE_CTL(pipe, plane) \
> _MMIO_PLANE(plane, _PLANE_CTL_1(pipe), _PLANE_CTL_2(pipe))
>
> #define _PLANE_STRIDE_1_B 0x71188
> #define _PLANE_STRIDE_2_B 0x71288
> -#define _PLANE_STRIDE_3_B 0x71388
> #define _PLANE_STRIDE_1(pipe) \
> _PIPE(pipe, _PLANE_STRIDE_1_A, _PLANE_STRIDE_1_B)
> #define _PLANE_STRIDE_2(pipe) \
> _PIPE(pipe, _PLANE_STRIDE_2_A, _PLANE_STRIDE_2_B)
> -#define _PLANE_STRIDE_3(pipe) \
> - _PIPE(pipe, _PLANE_STRIDE_3_A, _PLANE_STRIDE_3_B)
> #define PLANE_STRIDE(pipe, plane) \
> _MMIO_PLANE(plane, _PLANE_STRIDE_1(pipe), _PLANE_STRIDE_2(pipe))
>
> #define _PLANE_POS_1_B 0x7118c
> #define _PLANE_POS_2_B 0x7128c
> -#define _PLANE_POS_3_B 0x7138c
> #define _PLANE_POS_1(pipe) _PIPE(pipe, _PLANE_POS_1_A, _PLANE_POS_1_B)
> #define _PLANE_POS_2(pipe) _PIPE(pipe, _PLANE_POS_2_A, _PLANE_POS_2_B)
> -#define _PLANE_POS_3(pipe) _PIPE(pipe, _PLANE_POS_3_A, _PLANE_POS_3_B)
> #define PLANE_POS(pipe, plane) \
> _MMIO_PLANE(plane, _PLANE_POS_1(pipe), _PLANE_POS_2(pipe))
>
> #define _PLANE_SIZE_1_B 0x71190
> #define _PLANE_SIZE_2_B 0x71290
> -#define _PLANE_SIZE_3_B 0x71390
> #define _PLANE_SIZE_1(pipe) _PIPE(pipe, _PLANE_SIZE_1_A, _PLANE_SIZE_1_B)
> #define _PLANE_SIZE_2(pipe) _PIPE(pipe, _PLANE_SIZE_2_A, _PLANE_SIZE_2_B)
> -#define _PLANE_SIZE_3(pipe) _PIPE(pipe, _PLANE_SIZE_3_A, _PLANE_SIZE_3_B)
> #define PLANE_SIZE(pipe, plane) \
> _MMIO_PLANE(plane, _PLANE_SIZE_1(pipe), _PLANE_SIZE_2(pipe))
>
> #define _PLANE_SURF_1_B 0x7119c
> #define _PLANE_SURF_2_B 0x7129c
> -#define _PLANE_SURF_3_B 0x7139c
> #define _PLANE_SURF_1(pipe) _PIPE(pipe, _PLANE_SURF_1_A, _PLANE_SURF_1_B)
> #define _PLANE_SURF_2(pipe) _PIPE(pipe, _PLANE_SURF_2_A, _PLANE_SURF_2_B)
> -#define _PLANE_SURF_3(pipe) _PIPE(pipe, _PLANE_SURF_3_A, _PLANE_SURF_3_B)
> #define PLANE_SURF(pipe, plane) \
> _MMIO_PLANE(plane, _PLANE_SURF_1(pipe), _PLANE_SURF_2(pipe))
>
> @@ -351,7 +340,6 @@
>
> #define _PLANE_COLOR_CTL_1_B 0x711CC
> #define _PLANE_COLOR_CTL_2_B 0x712CC
> -#define _PLANE_COLOR_CTL_3_B 0x713CC
> #define _PLANE_COLOR_CTL_1(pipe) \
> _PIPE(pipe, _PLANE_COLOR_CTL_1_A, _PLANE_COLOR_CTL_1_B)
> #define _PLANE_COLOR_CTL_2(pipe) \
--
Jani Nikula, Intel
More information about the Intel-gfx
mailing list