[PATCH v2 1/3] drm/i915/psr: LunarLake IO and Fast Wake time line count maximums are 68

[Shankar, Uma]

> -----Original Message-----
> From: Hogander, Jouni <jouni.hogander at intel.com>
> Sent: Friday, May 17, 2024 1:00 PM
> To: intel-gfx at lists.freedesktop.org
> Cc: Shankar, Uma <uma.shankar at intel.com>; Hogander, Jouni
> <jouni.hogander at intel.com>
> Subject: [PATCH v2 1/3] drm/i915/psr: LunarLake IO and Fast Wake time line
> count maximums are 68
> 
> On LunarLake maximum for IO and Fast Wake time line counts are 68: 6 bits +
> 5 lines added by the HW. Take this into account in calculation and when writing
> the IO Wake lines.
> 
> v2: maximum line count is 68 (6 bits + 5 lines added by HW)

Looks Good to me.
Reviewed-by: Uma Shankar <uma.shankar at intel.com>

> Signed-off-by: Jouni Högander <jouni.hogander at intel.com>
> ---
>  drivers/gpu/drm/i915/display/intel_psr.c | 5 +++--
>  1 file changed, 3 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_psr.c
> b/drivers/gpu/drm/i915/display/intel_psr.c
> index df0d14a5023f..f5d3eb776833 100644
> --- a/drivers/gpu/drm/i915/display/intel_psr.c
> +++ b/drivers/gpu/drm/i915/display/intel_psr.c
> @@ -1421,8 +1421,9 @@ static bool _compute_alpm_params(struct intel_dp
> *intel_dp,
>  	fast_wake_time = precharge + preamble + phy_wake +
>  		tfw_exit_latency;
> 
> -	if (DISPLAY_VER(i915) >= 12)
> -		/* TODO: Check how we can use ALPM_CTL fast wake extended
> field */
> +	if (DISPLAY_VER(i915) >= 20)
> +		max_wake_lines = 68;
> +	else if (DISPLAY_VER(i915) >= 12)
>  		max_wake_lines = 12;
>  	else
>  		max_wake_lines = 8;
> --
> 2.34.1