[PATCH 1/3] drm/i915/psr: LunarLake IO and Fast Wake time line count maximums are 63

[Shankar, Uma]

> -----Original Message-----
> From: Hogander, Jouni <jouni.hogander at intel.com>
> Sent: Friday, May 17, 2024 1:02 PM
> To: Shankar, Uma <uma.shankar at intel.com>; intel-gfx at lists.freedesktop.org
> Subject: Re: [PATCH 1/3] drm/i915/psr: LunarLake IO and Fast Wake time line
> count maximums are 63
> 
> On Fri, 2024-05-17 at 06:28 +0000, Shankar, Uma wrote:
> >
> >
> > > -----Original Message-----
> > > From: Intel-gfx <intel-gfx-bounces at lists.freedesktop.org> On Behalf
> > > Of Jouni Högander
> > > Sent: Friday, May 3, 2024 11:36 AM
> > > To: intel-gfx at lists.freedesktop.org
> > > Cc: Hogander, Jouni <jouni.hogander at intel.com>
> > > Subject: [PATCH 1/3] drm/i915/psr: LunarLake IO and Fast Wake time
> > > line count maximums are 63
> > >
> > > On LunarLake maximum for IO and Fast Wake times are 63. Take this
> > > into account in calculation and when writing the IO Wake lines.
> > >
> > > Bspec: 69885, 70294
> > >
> > > Signed-off-by: Jouni Högander <jouni.hogander at intel.com>
> > > ---
> > >  drivers/gpu/drm/i915/display/intel_psr.c | 5 +++--
> > >  1 file changed, 3 insertions(+), 2 deletions(-)
> > >
> > > diff --git a/drivers/gpu/drm/i915/display/intel_psr.c
> > > b/drivers/gpu/drm/i915/display/intel_psr.c
> > > index f5b33335a9ae..678987bbe168 100644
> > > --- a/drivers/gpu/drm/i915/display/intel_psr.c
> > > +++ b/drivers/gpu/drm/i915/display/intel_psr.c
> > > @@ -1364,8 +1364,9 @@ static bool _compute_alpm_params(struct
> > > intel_dp *intel_dp,
> > >         fast_wake_time = precharge + preamble + phy_wake +
> > >                 tfw_exit_latency;
> > >
> > > -       if (DISPLAY_VER(i915) >= 12)
> > > -               /* TODO: Check how we can use ALPM_CTL fast wake
> > > extended field */
> > > +       if (DISPLAY_VER(i915) >= 20)
> > > +               max_wake_lines = 63;
> >
> > As per spec, hardware will add 5 extra lines to the programmed value.
> > For prior platforms it was set to 12 as 7 (3bits) + 5. I guess we
> > should make this consistent.
> 
> Thank you Uma for pointing this out. I have fixed this and the typo you mentioned
> on patch 3. Please recheck.

Hi Jouni, 
Looks good, RB'ed now. You can go ahead for merge (seems some unrelated CI failures are there).

Regards,
Uma Shankar

> BR,
> 
> Jouni Högander
> >
> > Regards,
> > Uma Shankar
> >
> > > +       else if (DISPLAY_VER(i915) >= 12)
> > >                 max_wake_lines = 12;
> > >         else
> > >                 max_wake_lines = 8;
> > > --
> > > 2.34.1
> >