[PATCH v3] drm/i915/mtl: Update workaround 14018575942
Chen, Angus
angus.chen at intel.com
Fri May 24 17:33:49 UTC 2024
The WA should be extended to cover VDBOX engine. We found that
28-channels 1080p VP9 encoding may hit this issue.
v3: update the WA number and explain the reason why
this workaround is needed
v2: add WA number
v1: initial version
Signed-off-by: Chen, Angus <angus.chen at intel.com>
---
drivers/gpu/drm/i915/gt/intel_workarounds.c | 8 ++++++++
1 file changed, 8 insertions(+)
diff --git a/drivers/gpu/drm/i915/gt/intel_workarounds.c b/drivers/gpu/drm/i915/gt/intel_workarounds.c
index d1ab560fcdfc..05d56103ddab 100644
--- a/drivers/gpu/drm/i915/gt/intel_workarounds.c
+++ b/drivers/gpu/drm/i915/gt/intel_workarounds.c
@@ -1586,6 +1586,14 @@ xelpmp_gt_workarounds_init(struct intel_gt *gt, struct i915_wa_list *wal)
*/
wa_write_or(wal, XELPMP_GSC_MOD_CTRL, FORCE_MISS_FTLB);
+ /*
+ * Wa_14018575942
+ *
+ * Issue is seen on media KPI test running on VDBOX engine
+ * especially VP9 encoding WLs
+ */
+ wa_write_or(wal, XELPMP_VDBX_MOD_CTRL, FORCE_MISS_FTLB);
+
/* Wa_22016670082 */
wa_write_or(wal, GEN12_SQCNT1, GEN12_STRICT_RAR_ENABLE);
--
2.34.1
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