[PATCH v2] drm/i915/psr: Disable psr1 if setup_time > vblank

Hogander, Jouni jouni.hogander at intel.com
Thu Nov 14 09:40:30 UTC 2024


On Tue, 2024-11-05 at 16:09 +0530, Animesh Manna wrote:
> Issue is seen when PSR enabled with setup frames and when try to
> disable
> PSR at SRDONACK State (0x1). PSR FSM is stuck at SRDONACK(0x1) for
> more
> than 5 seconds. Issue not seen with Setup frames disabled. Currently
> disable psr1 if setuptime > vblank to workaround the above issue.
> 
> HSD: 16024594674
> WA: 18037818876
> 
> v1: Initial version
> v2: Add debug log and some cosmetic changes. [Jouni, Jani, Nemesa]
> 
> Signed-off-by: Animesh Manna <animesh.manna at intel.com>

Reviewed-by: Jouni Högander <jouni.hogander at intel.com>

> ---
>  drivers/gpu/drm/i915/display/intel_psr.c | 16 ++++++++++++++++
>  1 file changed, 16 insertions(+)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_psr.c
> b/drivers/gpu/drm/i915/display/intel_psr.c
> index 4176163ec19a..d8eb0d427d8c 100644
> --- a/drivers/gpu/drm/i915/display/intel_psr.c
> +++ b/drivers/gpu/drm/i915/display/intel_psr.c
> @@ -1640,6 +1640,15 @@ _panel_replay_compute_config(struct intel_dp
> *intel_dp,
>         return true;
>  }
>  
> +static bool intel_psr_needs_wa_18037818876(struct intel_dp
> *intel_dp,
> +                                          struct intel_crtc_state
> *crtc_state)
> +{
> +       struct intel_display *display = to_intel_display(intel_dp);
> +
> +       return (DISPLAY_VER(display) == 20 && intel_dp-
> >psr.entry_setup_frames > 0 &&
> +               !crtc_state->has_sel_update);
> +}
> +
>  void intel_psr_compute_config(struct intel_dp *intel_dp,
>                               struct intel_crtc_state *crtc_state,
>                               struct drm_connector_state *conn_state)
> @@ -1686,6 +1695,13 @@ void intel_psr_compute_config(struct intel_dp
> *intel_dp,
>                 return;
>  
>         crtc_state->has_sel_update =
> intel_sel_update_config_valid(intel_dp, crtc_state);
> +
> +       /* Wa_18037818876 */
> +       if (intel_psr_needs_wa_18037818876(intel_dp, crtc_state)) {
> +               crtc_state->has_psr = false;
> +               drm_dbg_kms(display->drm,
> +                           "PSR disabled to workaround PSR FSM hang
> issue\n");
> +       }
>  }
>  
>  void intel_psr_get_config(struct intel_encoder *encoder,



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