[PATCH 4/7] drm/i915: Enable 10bpc + CCS on ICL
Juha-Pekka Heikkila
juhapekka.heikkila at gmail.com
Fri Oct 4 13:36:39 UTC 2024
Here the same question on the depth as on patch 3/7, otherwise things look.
On 18.9.2024 17.44, Ville Syrjala wrote:
> From: Ville Syrjälä <ville.syrjala at linux.intel.com>
>
> ICL also supports compressed 10bpc scanout. Enable it.
>
> v2: Set .depth=30 for all variants to match drm_fourcc.c
>
> Signed-off-by: Ville Syrjälä <ville.syrjala at linux.intel.com>
> ---
> drivers/gpu/drm/i915/display/intel_fb.c | 8 +++
> .../drm/i915/display/skl_universal_plane.c | 65 +++++++++++++++++++
> 2 files changed, 73 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_fb.c b/drivers/gpu/drm/i915/display/intel_fb.c
> index 9b9da4f71f73..83495e165da7 100644
> --- a/drivers/gpu/drm/i915/display/intel_fb.c
> +++ b/drivers/gpu/drm/i915/display/intel_fb.c
> @@ -45,6 +45,14 @@ static const struct drm_format_info skl_ccs_formats[] = {
> .cpp = { 4, 1, }, .hsub = 8, .vsub = 16, .has_alpha = true, },
> { .format = DRM_FORMAT_ABGR8888, .depth = 32, .num_planes = 2,
> .cpp = { 4, 1, }, .hsub = 8, .vsub = 16, .has_alpha = true, },
> + { .format = DRM_FORMAT_XRGB2101010, .depth = 30, .num_planes = 2,
> + .cpp = { 4, 1, }, .hsub = 8, .vsub = 16, },
> + { .format = DRM_FORMAT_XBGR2101010, .depth = 30, .num_planes = 2,
> + .cpp = { 4, 1, }, .hsub = 8, .vsub = 16, },
> + { .format = DRM_FORMAT_ARGB2101010, .depth = 30, .num_planes = 2,
> + .cpp = { 4, 1, }, .hsub = 8, .vsub = 16, .has_alpha = true, },
> + { .format = DRM_FORMAT_ABGR2101010, .depth = 30, .num_planes = 2,
> + .cpp = { 4, 1, }, .hsub = 8, .vsub = 16, .has_alpha = true, },
> };
>
> /*
> diff --git a/drivers/gpu/drm/i915/display/skl_universal_plane.c b/drivers/gpu/drm/i915/display/skl_universal_plane.c
> index 9f34df60b112..8817758ef10d 100644
> --- a/drivers/gpu/drm/i915/display/skl_universal_plane.c
> +++ b/drivers/gpu/drm/i915/display/skl_universal_plane.c
> @@ -2302,6 +2302,60 @@ static bool skl_plane_format_mod_supported(struct drm_plane *_plane,
> }
> }
>
> +static bool icl_plane_format_mod_supported(struct drm_plane *_plane,
> + u32 format, u64 modifier)
> +{
> + struct intel_plane *plane = to_intel_plane(_plane);
> +
> + if (!intel_fb_plane_supports_modifier(plane, modifier))
> + return false;
> +
> + switch (format) {
> + case DRM_FORMAT_XRGB8888:
> + case DRM_FORMAT_XBGR8888:
> + case DRM_FORMAT_ARGB8888:
> + case DRM_FORMAT_ABGR8888:
> + case DRM_FORMAT_XRGB2101010:
> + case DRM_FORMAT_XBGR2101010:
> + case DRM_FORMAT_ARGB2101010:
> + case DRM_FORMAT_ABGR2101010:
> + if (intel_fb_is_ccs_modifier(modifier))
> + return true;
> + fallthrough;
> + case DRM_FORMAT_RGB565:
> + case DRM_FORMAT_YUYV:
> + case DRM_FORMAT_YVYU:
> + case DRM_FORMAT_UYVY:
> + case DRM_FORMAT_VYUY:
> + case DRM_FORMAT_NV12:
> + case DRM_FORMAT_XYUV8888:
> + case DRM_FORMAT_P010:
> + case DRM_FORMAT_P012:
> + case DRM_FORMAT_P016:
> + case DRM_FORMAT_XVYU2101010:
> + if (modifier == I915_FORMAT_MOD_Yf_TILED)
> + return true;
> + fallthrough;
> + case DRM_FORMAT_C8:
> + case DRM_FORMAT_XBGR16161616F:
> + case DRM_FORMAT_ABGR16161616F:
> + case DRM_FORMAT_XRGB16161616F:
> + case DRM_FORMAT_ARGB16161616F:
> + case DRM_FORMAT_Y210:
> + case DRM_FORMAT_Y212:
> + case DRM_FORMAT_Y216:
> + case DRM_FORMAT_XVYU12_16161616:
> + case DRM_FORMAT_XVYU16161616:
> + if (modifier == DRM_FORMAT_MOD_LINEAR ||
> + modifier == I915_FORMAT_MOD_X_TILED ||
> + modifier == I915_FORMAT_MOD_Y_TILED)
> + return true;
> + fallthrough;
> + default:
> + return false;
> + }
> +}
> +
> static bool gen12_plane_format_mod_supported(struct drm_plane *_plane,
> u32 format, u64 modifier)
> {
> @@ -2363,6 +2417,15 @@ static const struct drm_plane_funcs skl_plane_funcs = {
> .format_mod_supported = skl_plane_format_mod_supported,
> };
>
> +static const struct drm_plane_funcs icl_plane_funcs = {
> + .update_plane = drm_atomic_helper_update_plane,
> + .disable_plane = drm_atomic_helper_disable_plane,
> + .destroy = intel_plane_destroy,
> + .atomic_duplicate_state = intel_plane_duplicate_state,
> + .atomic_destroy_state = intel_plane_destroy_state,
> + .format_mod_supported = icl_plane_format_mod_supported,
> +};
> +
> static const struct drm_plane_funcs gen12_plane_funcs = {
> .update_plane = drm_atomic_helper_update_plane,
> .disable_plane = drm_atomic_helper_disable_plane,
> @@ -2542,6 +2605,8 @@ skl_universal_plane_create(struct drm_i915_private *dev_priv,
>
> if (DISPLAY_VER(dev_priv) >= 12)
> plane_funcs = &gen12_plane_funcs;
> + else if (DISPLAY_VER(dev_priv) == 11)
> + plane_funcs = &icl_plane_funcs;
> else
> plane_funcs = &skl_plane_funcs;
>
More information about the Intel-gfx
mailing list