[PATCH i-g-t] xe: Add test to check pci memory barrier capability

[Jani Nikula]

On Wed, 09 Oct 2024, Kamil Konieczny <kamil.konieczny at linux.intel.com> wrote:
> Hi Tejas,
> On 2024-10-09 at 15:26:08 +0530, Tejas Upadhyay wrote:
>> We want to make sure that direct mmap mapping of physical
>> page at doorbell space and whole page is accessible in order
>> to use pci memory barrier effect effectively.
>> 
>> This is basic pci memory barrier test to showcase xe driver
>> support for feature. In follow up patches we will have more
>> of corner and negative tests added later.
>> 
>> Signed-off-by: Tejas Upadhyay <tejas.upadhyay at intel.com>
>> ---
>>  include/drm-uapi/xe_drm.h       |  3 ++
>
> Please send updates to drm-uapi with a separate patch.

Possibly the best way to codify kernel header updates would be to script
them.

This is what I did with intel_vbt_defs.h to automate. Should be pretty
easy to tweak for other headers.

BR,
Jani.


#!/bin/bash

SINCE=962601ac4c78
INFILE=drivers/gpu/drm/i915/display/intel_vbt_defs.h
OUTFILE=tools/intel_vbt_defs.h
KERNEL=$HOME/src/linux
IGT=$HOME/src/intel-gpu-tools


cd $KERNEL

for commit in $(git log --reverse --pretty=%h $SINCE..HEAD -- $INFILE); do
	ref=$(git cite $commit)
	git show $commit:$INFILE > $IGT/$OUTFILE
	cd $IGT
	git commit -as \
	    -m "tools/intel_vbt_decode: sync intel_vbt_defs.h with kernel commit $commit" \
	    -m "Synchronize intel_vbt_defs.h with kernel commit:" \
	    -m "$ref"
	cd -
done


-- 
Jani Nikula, Intel