[PATCH 6/9] drm/i915/display: Add DSC pixel replication
kernel test robot
lkp at intel.com
Wed Oct 16 11:00:36 UTC 2024
Hi Ankit,
kernel test robot noticed the following build errors:
[auto build test ERROR on drm-intel/for-linux-next]
[also build test ERROR on next-20241016]
[cannot apply to drm-intel/for-linux-next-fixes drm-tip/drm-tip linus/master v6.12-rc3]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch#_base_tree_information]
url: https://github.com/intel-lab-lkp/linux/commits/Ankit-Nautiyal/drm-i915-display-Prepare-for-dsc-3-stream-splitter/20241014-161007
base: git://anongit.freedesktop.org/drm-intel for-linux-next
patch link: https://lore.kernel.org/r/20241014081000.2844245-7-ankit.k.nautiyal%40intel.com
patch subject: [PATCH 6/9] drm/i915/display: Add DSC pixel replication
config: x86_64-randconfig-012-20241015 (https://download.01.org/0day-ci/archive/20241016/202410161836.lQv7K89f-lkp@intel.com/config)
compiler: clang version 18.1.8 (https://github.com/llvm/llvm-project 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)
reproduce (this is a W=1 build): (https://download.01.org/0day-ci/archive/20241016/202410161836.lQv7K89f-lkp@intel.com/reproduce)
If you fix the issue in a separate patch/commit (i.e. not just a new version of
the same patch/commit), kindly add following tags
| Reported-by: kernel test robot <lkp at intel.com>
| Closes: https://lore.kernel.org/oe-kbuild-all/202410161836.lQv7K89f-lkp@intel.com/
All errors (new ones prefixed by >>):
>> drivers/gpu/drm/i915/display/intel_vdsc.c:1022:6: error: variable 'dss_ctl3' is uninitialized when used here [-Werror,-Wuninitialized]
1022 | if (dss_ctl3 & DSC_PIXEL_REPLICATION_MASK)
| ^~~~~~~~
drivers/gpu/drm/i915/display/intel_vdsc.c:991:34: note: initialize the variable 'dss_ctl3' to silence this warning
991 | u32 dss_ctl1, dss_ctl2, dss_ctl3;
| ^
| = 0
1 error generated.
vim +/dss_ctl3 +1022 drivers/gpu/drm/i915/display/intel_vdsc.c
983
984 void intel_dsc_get_config(struct intel_crtc_state *crtc_state)
985 {
986 struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
987 struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
988 enum transcoder cpu_transcoder = crtc_state->cpu_transcoder;
989 enum intel_display_power_domain power_domain;
990 intel_wakeref_t wakeref;
991 u32 dss_ctl1, dss_ctl2, dss_ctl3;
992
993 if (!intel_dsc_source_support(crtc_state))
994 return;
995
996 power_domain = intel_dsc_power_domain(crtc, cpu_transcoder);
997
998 wakeref = intel_display_power_get_if_enabled(dev_priv, power_domain);
999 if (!wakeref)
1000 return;
1001
1002 dss_ctl1 = intel_de_read(dev_priv, dss_ctl1_reg(crtc, cpu_transcoder));
1003 dss_ctl2 = intel_de_read(dev_priv, dss_ctl2_reg(crtc, cpu_transcoder));
1004
1005 if (IS_BATTLEMAGE(dev_priv))
1006 dss_ctl3 = intel_de_read(dev_priv, BMG_PIPE_DSS_CTL3(crtc_state->cpu_transcoder));
1007
1008 crtc_state->dsc.compression_enable = dss_ctl2 & VDSC0_ENABLE;
1009 if (!crtc_state->dsc.compression_enable)
1010 goto out;
1011
1012 if (dss_ctl1 & JOINER_ENABLE) {
1013 if (dss_ctl2 & (VDSC2_ENABLE | SMALL_JOINER_CONFIG_3_ENGINES))
1014 crtc_state->dsc.dsc_split = INTEL_DSC_SPLIT_3_STREAMS;
1015
1016 else if (dss_ctl2 & VDSC1_ENABLE)
1017 crtc_state->dsc.dsc_split = INTEL_DSC_SPLIT_2_STREAMS;
1018 } else {
1019 crtc_state->dsc.dsc_split = INTEL_DSC_SPLIT_DISABLED;
1020 }
1021
> 1022 if (dss_ctl3 & DSC_PIXEL_REPLICATION_MASK)
1023 crtc_state->dsc.pixel_replication_count =
1024 dss_ctl3 & DSC_PIXEL_REPLICATION_MASK;
1025
1026 intel_dsc_get_pps_config(crtc_state);
1027 out:
1028 intel_display_power_put(dev_priv, power_domain, wakeref);
1029 }
1030
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