[PATCH 00/16] Add support for 3 VDSC engines 12 slices

Ankit Nautiyal ankit.k.nautiyal at intel.com
Wed Oct 23 06:52:41 UTC 2024


For BMG 3 VDSC engines are supported and each pipe can then support
3 slices. For Ultra joiner cases for modes like 8k at 120 Hz we require
ultrajoiner and 3 x 4= 12 slices.
Add support for 3 VDSC engines and 12 DSC slices. Along with this
Pixel replication and Odd pixel considerartions are also required.

Rev2: Rebase
Rev3:
-Add patch to account for pixel replication in pipe_src.
-Fix kernel test bot warning.
-Minor refactoring.
Rev4:
-Address review comments from last version.
-Add BW consideration with pixel replication
-Split Odd pixel handling in separate patches.
Rev 5:
-Use num_streams instead of dsc_split.

Ankit Nautiyal (16):
  drm/i915/dp: Update Comment for Valid DSC Slices per Line
  drm/i915/display: Prepare for dsc 3 stream splitter
  drm/i915/vdsc: Use VDSC0/VDSC1 for LEFT/RIGHT VDSC engine
  drm/i915/vdsc: Introduce 3rd VDSC engine VDSC2
  drm/i915/vdsc: Add support for read/write PPS for 3rd DSC engine
  drm/i915/dp: Ensure hactive is divisible by slice count
  drm/i915/dp: Enable 3 DSC engines for 12 slices
  drm/i915/display: Add macro HAS_PIXEL_REPLICATION
  drm/i915/display: Add support for DSC pixel replication
  drm/i915/dp_mst: Account for pixel replication for MST overhead with
    DSC
  drm/i915/dp: Account for pixel replication for BW computation with DSC
  drm/i915/display: Account for pixel replication in pipe_src
  drm/i915/dp: Enable DSC pixel replication
  drm/i915/dsc: Introduce odd pixel removal
  drm/i915/display: Adjust Pipe SRC Width for Odd Pixels
  drm/i915/dp: Add Check for Odd Pixel Requirement

 drivers/gpu/drm/i915/display/icl_dsi.c        |   4 +-
 drivers/gpu/drm/i915/display/intel_display.c  |  36 +++++-
 .../drm/i915/display/intel_display_device.h   |   3 +
 .../drm/i915/display/intel_display_types.h    |   4 +-
 drivers/gpu/drm/i915/display/intel_dp.c       |  89 +++++++++++++--
 drivers/gpu/drm/i915/display/intel_dp.h       |   2 +
 drivers/gpu/drm/i915/display/intel_dp_mst.c   |  20 +++-
 drivers/gpu/drm/i915/display/intel_vdsc.c     | 105 ++++++++++++++++--
 drivers/gpu/drm/i915/display/intel_vdsc.h     |   9 ++
 .../gpu/drm/i915/display/intel_vdsc_regs.h    |  22 +++-
 10 files changed, 267 insertions(+), 27 deletions(-)

-- 
2.45.2



More information about the Intel-gfx mailing list