[PATCH v2] drm/i915/display: Fuse bit for power management disable removed

[Matt Roper]

On Fri, Oct 18, 2024 at 12:59:19PM -0700, Clint Taylor wrote:
> Starting with Display 13 the fuse bit to disable Display PM has been
> removed.
> 
> v2: Bit removed starting with Display13 (MattR)

Nitpicks: we should write this out as "display version 13" in the two
places above rather than treating it as a proper noun.  Also, there
should be a blank line here after the changelog before the git trailers
start.

> BSPEC: 69464

We should use/add 50075 here, since that's the page that actually shows
exactly when the bit was removed in the Xe1 era.  69464 is the Xe2 page
that just confirms that it's still gone in Xe2.

> Cc: Matt Roper <matthew.d.roper at intel.com>
> Signed-off-by: Clint Taylor <clinton.a.taylor at intel.com>
> Signed-off-by: Matt Atwood <matthew.s.atwood at intel.com>
> ---
>  drivers/gpu/drm/i915/display/intel_display_device.c | 6 ++++--
>  1 file changed, 4 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_display_device.c b/drivers/gpu/drm/i915/display/intel_display_device.c
> index aa22189e3853..1ec72ac2320a 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_device.c
> +++ b/drivers/gpu/drm/i915/display/intel_display_device.c
> @@ -1659,8 +1659,10 @@ static void __intel_display_device_info_runtime_init(struct drm_i915_private *i9
>  		if (dfsm & SKL_DFSM_DISPLAY_HDCP_DISABLE)
>  			display_runtime->has_hdcp = 0;
>  
> -		if (dfsm & SKL_DFSM_DISPLAY_PM_DISABLE)
> -			display_runtime->fbc_mask = 0;
> +		if (DISPLAY_VER(i915) < 13) {

Both DG2 and ADL-P share display version 13 and according to bspec
50075, the bit does still exist on DG2.  So we probably need the
condition to be "IS_DG2 || ver < 13."


Matt

> +			if (dfsm & SKL_DFSM_DISPLAY_PM_DISABLE)
> +				display_runtime->fbc_mask = 0;
> +		}
>  
>  		if (DISPLAY_VER(i915) >= 11 && (dfsm & ICL_DFSM_DMC_DISABLE))
>  			display_runtime->has_dmc = 0;
> -- 
> 2.25.1
> 

-- 
Matt Roper
Graphics Software Engineer
Linux GPU Platform Enablement
Intel Corporation