[PATCH 1/4] drm/i915/xe3lpd: Increase resolution for plane to support 6k
Nautiyal, Ankit K
ankit.k.nautiyal at intel.com
Fri Oct 25 04:05:14 UTC 2024
On 10/25/2024 1:18 AM, Matt Roper wrote:
> On Thu, Oct 24, 2024 at 05:16:51PM +0530, Nautiyal, Ankit K wrote:
>> On 10/24/2024 9:25 AM, Suraj Kandpal wrote:
>>> DISPLAY_VER >= 30 onwards CRTC can now support 6k resolution.
>>> Increase pipe and plane max width and height to reflect this
>> Only max width is changed.
>>
>>> increase in resolution.
>>>
>>> --v2
>>> -Take care of the subsampling scenario sooner rather than later [Matt]
>>>
>>> Signed-off-by: Arun R Murthy <arun.r.murthy at intel.com>
>>> Signed-off-by: Suraj Kandpal <suraj.kandpal at intel.com>
>>> ---
>>> drivers/gpu/drm/i915/display/intel_display.c | 5 ++++-
>>> .../gpu/drm/i915/display/skl_universal_plane.c | 16 +++++++++++++++-
>>> 2 files changed, 19 insertions(+), 2 deletions(-)
>>>
>>> diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
>>> index e1f6255e918b..37bac53f996e 100644
>>> --- a/drivers/gpu/drm/i915/display/intel_display.c
>>> +++ b/drivers/gpu/drm/i915/display/intel_display.c
>>> @@ -8432,7 +8432,10 @@ intel_mode_valid_max_plane_size(struct drm_i915_private *dev_priv,
>>> * plane so let's not advertize modes that are
>>> * too big for that.
>>> */
>>> - if (DISPLAY_VER(dev_priv) >= 11) {
>>> + if (DISPLAY_VER(dev_priv) >= 30) {
>>> + plane_width_max = 6144 * num_joined_pipes;
>>> + plane_height_max = 4096;
>> plane_height_max is not changed, should be 4320.
It was based on what was coded for last platform, as this platform did
not change the max height.
But I realize that the older platform itself is not fully correct,
thanks for pointing this out.
> Where do you see that documented? At least on bspec 68858 it says
>
> Unjoined pipe source size, plane size, and pipe active size
> maximum vertical 4096.
>
> and based on bspec 49199, that restriction goes back to at least gen12.
> So it looks like we might have a bug on older platforms that needs to be
> fixed.
>
> When using the joiner the vertical limit goes up to 4320 (on Xe1
> platforms) or 4800 (on Xe2/Xe3 platforms).
I agree, as you mentioned above, we need to have max_height based on
num_of_joined pipes:
// For Xe2 and beyond
max_height = num_joined_pipes == 1 ? 4096 : 4800;
// For Xe
max_height = num_joined_pipes == 1 ? 4096 : 4320;
Regards,
Ankit
>
>
> Matt
>
>> Otherwise looks good to me. With the above fixed:
>>
>> Reviewed-by: Ankit Nautiyal <ankit.k.nautiyal at intel.com>
>>
>>
>>> + } else if (DISPLAY_VER(dev_priv) >= 11) {
>>> plane_width_max = 5120 * num_joined_pipes;
>>> plane_height_max = 4320;
>>> } else {
>>> diff --git a/drivers/gpu/drm/i915/display/skl_universal_plane.c b/drivers/gpu/drm/i915/display/skl_universal_plane.c
>>> index 9207b7e96974..b3660c71e499 100644
>>> --- a/drivers/gpu/drm/i915/display/skl_universal_plane.c
>>> +++ b/drivers/gpu/drm/i915/display/skl_universal_plane.c
>>> @@ -432,6 +432,16 @@ static int icl_plane_min_width(const struct drm_framebuffer *fb,
>>> }
>>> }
>>> +static int xe3_plane_max_width(const struct drm_framebuffer *fb,
>>> + int color_plane,
>>> + unsigned int rotation)
>>> +{
>>> + if (intel_format_info_is_yuv_semiplanar(fb->format, fb->modifier))
>>> + return 4096;
>>> + else
>>> + return 6144;
>>> +}
>>> +
>>> static int icl_hdr_plane_max_width(const struct drm_framebuffer *fb,
>>> int color_plane,
>>> unsigned int rotation)
>>> @@ -2511,7 +2521,11 @@ skl_universal_plane_create(struct drm_i915_private *dev_priv,
>>> intel_fbc_add_plane(skl_plane_fbc(dev_priv, pipe, plane_id), plane);
>>> - if (DISPLAY_VER(dev_priv) >= 11) {
>>> + if (DISPLAY_VER(dev_priv) >= 30) {
>>> + plane->max_width = xe3_plane_max_width;
>>> + plane->max_height = icl_plane_max_height;
>>> + plane->min_cdclk = icl_plane_min_cdclk;
>>> + } else if (DISPLAY_VER(dev_priv) >= 11) {
>>> plane->min_width = icl_plane_min_width;
>>> if (icl_is_hdr_plane(dev_priv, plane_id))
>>> plane->max_width = icl_hdr_plane_max_width;
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