[PATCH v3 0/2] drm/i915/display: Power request asserting/deasserting

Raag Jadav raag.jadav at intel.com
Thu Oct 31 12:59:00 UTC 2024


On Thu, Oct 31, 2024 at 01:40:25PM +0200, Mika Kahola wrote:
> There is a HW issue that arises when there are race conditions
> between TCSS entering/exiting TC7 or TC10 states while the
> driver is asserting/deasserting TCSS power request. As a
> workaround, Display driver will implement a mailbox sequence
> to ensure that the TCSS is in TC0 when TCSS power request is
> asserted/deasserted.
> 
> The sequence is the following
> 
> 1. Read mailbox command status and wait until run/busy bit is
>    clear
> 2. Write mailbox data value '1' for power request asserting
>    and '0' for power request deasserting
> 3. Write mailbox command run/busy bit and command value with 0x1
> 4. Read mailbox command and wait until run/busy bit is clear
>    before continuing power request.
> 
> while at it, let's start using struct intel_display instead of
> struct drm_i915_private as well.

Perhaps this needs to be its own patch since it's unrelated to the series.

Raag


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