[PATCH 03/13] drm/i915/display: Add member fixed_rr to denote Fixed refresh rate with VRRTG
Ankit Nautiyal
ankit.k.nautiyal at intel.com
Mon Sep 2 08:06:24 UTC 2024
Add fixed_rr member to struct vrr to represent the case where a
fixed refresh rate with VRR timing generator is required.
v2: Move get_config change where vrr.fixed is actually set. (Mitul)
Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal at intel.com>
---
drivers/gpu/drm/i915/display/intel_display.c | 4 +++-
drivers/gpu/drm/i915/display/intel_display_types.h | 2 +-
2 files changed, 4 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index 78ce402a5cd0..8b437e79c8df 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -1005,7 +1005,8 @@ static bool vrr_params_changed(const struct intel_crtc_state *old_crtc_state,
old_crtc_state->vrr.vmin != new_crtc_state->vrr.vmin ||
old_crtc_state->vrr.vmax != new_crtc_state->vrr.vmax ||
old_crtc_state->vrr.guardband != new_crtc_state->vrr.guardband ||
- old_crtc_state->vrr.pipeline_full != new_crtc_state->vrr.pipeline_full;
+ old_crtc_state->vrr.pipeline_full != new_crtc_state->vrr.pipeline_full ||
+ old_crtc_state->vrr.fixed_rr != new_crtc_state->vrr.fixed_rr;
}
static bool cmrr_params_changed(const struct intel_crtc_state *old_crtc_state,
@@ -5480,6 +5481,7 @@ intel_pipe_config_compare(const struct intel_crtc_state *current_config,
if (!fastset) {
PIPE_CONF_CHECK_BOOL(vrr.enable);
+ PIPE_CONF_CHECK_BOOL(vrr.fixed_rr);
PIPE_CONF_CHECK_I(vrr.vmin);
PIPE_CONF_CHECK_I(vrr.vmax);
PIPE_CONF_CHECK_I(vrr.flipline);
diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h b/drivers/gpu/drm/i915/display/intel_display_types.h
index 868ff8976ed9..62a796f61d20 100644
--- a/drivers/gpu/drm/i915/display/intel_display_types.h
+++ b/drivers/gpu/drm/i915/display/intel_display_types.h
@@ -1407,7 +1407,7 @@ struct intel_crtc_state {
/* Variable Refresh Rate state */
struct {
- bool enable, in_range;
+ bool enable, in_range, fixed_rr;
u8 pipeline_full;
u16 flipline, vmin, vmax, guardband;
u32 vsync_end, vsync_start;
--
2.45.2
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