[PATCH 04/13] drm/i915/display: Enable MSA Ignore Timing PAR only when in not fixed_rr mode

kernel test robot lkp at intel.com
Tue Sep 3 03:15:02 UTC 2024


Hi Ankit,

kernel test robot noticed the following build warnings:

[auto build test WARNING on drm-intel/for-linux-next]
[also build test WARNING on drm-tip/drm-tip next-20240902]
[cannot apply to drm-intel/for-linux-next-fixes linus/master v6.11-rc6]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch#_base_tree_information]

url:    https://github.com/intel-lab-lkp/linux/commits/Ankit-Nautiyal/drm-i915-dp-Avoid-vrr-compute-config-for-HDMI-sink/20240902-205135
base:   git://anongit.freedesktop.org/drm-intel for-linux-next
patch link:    https://lore.kernel.org/r/20240902080635.2946858-5-ankit.k.nautiyal%40intel.com
patch subject: [PATCH 04/13] drm/i915/display: Enable MSA Ignore Timing PAR only when in not fixed_rr mode
config: x86_64-rhel-8.3-rust (https://download.01.org/0day-ci/archive/20240903/202409031027.GftRdwjU-lkp@intel.com/config)
compiler: clang version 18.1.5 (https://github.com/llvm/llvm-project 617a15a9eac96088ae5e9134248d8236e34b91b1)
reproduce (this is a W=1 build): (https://download.01.org/0day-ci/archive/20240903/202409031027.GftRdwjU-lkp@intel.com/reproduce)

If you fix the issue in a separate patch/commit (i.e. not just a new version of
the same patch/commit), kindly add following tags
| Reported-by: kernel test robot <lkp at intel.com>
| Closes: https://lore.kernel.org/oe-kbuild-all/202409031027.GftRdwjU-lkp@intel.com/

All warnings (new ones prefixed by >>):

>> drivers/gpu/drm/i915/display/intel_dp_link_training.c:724:6: warning: variable 'enable_msa_timing_par_ignore' is used uninitialized whenever 'if' condition is false [-Wsometimes-uninitialized]
     724 |         if (crtc_state->vrr.enable && !crtc_state->vrr.fixed_rr)
         |             ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
   drivers/gpu/drm/i915/display/intel_dp_link_training.c:728:30: note: uninitialized use occurs here
     728 |                                         crtc_state->port_clock, enable_msa_timing_par_ignore);
         |                                                                 ^~~~~~~~~~~~~~~~~~~~~~~~~~~~
   drivers/gpu/drm/i915/display/intel_dp_link_training.c:724:2: note: remove the 'if' if its condition is always true
     724 |         if (crtc_state->vrr.enable && !crtc_state->vrr.fixed_rr)
         |         ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
     725 |                 enable_msa_timing_par_ignore = true;
>> drivers/gpu/drm/i915/display/intel_dp_link_training.c:724:6: warning: variable 'enable_msa_timing_par_ignore' is used uninitialized whenever '&&' condition is false [-Wsometimes-uninitialized]
     724 |         if (crtc_state->vrr.enable && !crtc_state->vrr.fixed_rr)
         |             ^~~~~~~~~~~~~~~~~~~~~~
   drivers/gpu/drm/i915/display/intel_dp_link_training.c:728:30: note: uninitialized use occurs here
     728 |                                         crtc_state->port_clock, enable_msa_timing_par_ignore);
         |                                                                 ^~~~~~~~~~~~~~~~~~~~~~~~~~~~
   drivers/gpu/drm/i915/display/intel_dp_link_training.c:724:6: note: remove the '&&' if its condition is always true
     724 |         if (crtc_state->vrr.enable && !crtc_state->vrr.fixed_rr)
         |             ^~~~~~~~~~~~~~~~~~~~~~~~~
   drivers/gpu/drm/i915/display/intel_dp_link_training.c:721:35: note: initialize the variable 'enable_msa_timing_par_ignore' to silence this warning
     721 |         bool enable_msa_timing_par_ignore;
         |                                          ^
         |                                           = 0
   2 warnings generated.


vim +724 drivers/gpu/drm/i915/display/intel_dp_link_training.c

   717	
   718	static void intel_dp_update_downspread_ctrl(struct intel_dp *intel_dp,
   719						    const struct intel_crtc_state *crtc_state)
   720	{
   721		bool enable_msa_timing_par_ignore;
   722	
   723		/* Enable MSA TIMING PAR IGNORE only in non fixed_rr mode */
 > 724		if (crtc_state->vrr.enable && !crtc_state->vrr.fixed_rr)
   725			enable_msa_timing_par_ignore = true;
   726	
   727		intel_dp_link_training_set_mode(intel_dp,
   728						crtc_state->port_clock, enable_msa_timing_par_ignore);
   729	}
   730	

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