[PATCH 10/14] drm/i915/display/vdsc: Add ultrajoiner support with DSC
Ville Syrjälä
ville.syrjala at linux.intel.com
Mon Sep 9 13:46:51 UTC 2024
On Mon, Sep 09, 2024 at 02:53:55PM +0530, Nautiyal, Ankit K wrote:
>
> On 9/6/2024 10:09 PM, Ville Syrjälä wrote:
> > On Fri, Sep 06, 2024 at 07:30:16PM +0300, Ville Syrjälä wrote:
> >> On Fri, Sep 06, 2024 at 06:28:03PM +0530, Ankit Nautiyal wrote:
> >>> From: Stanislav Lisovskiy <stanislav.lisovskiy at intel.com>
> >>>
> >>> Add changes to DSC which are required for Ultrajoiner.
> >>>
> >>> v2:
> >>> -Use correct helper for setting bits for bigjoiner secondary. (Ankit)
> >>> -Use enum for joiner pipe count instead magic numbers. (Suraj)
> >>> -Use primary/secondary instead of master/slave. (Suraj)
> >>>
> >>> Signed-off-by: Stanislav Lisovskiy <stanislav.lisovskiy at intel.com>
> >>> Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal at intel.com>
> >>> ---
> >>> drivers/gpu/drm/i915/display/intel_vdsc.c | 26 +++++++++++++++++++++--
> >>> 1 file changed, 24 insertions(+), 2 deletions(-)
> >>>
> >>> diff --git a/drivers/gpu/drm/i915/display/intel_vdsc.c b/drivers/gpu/drm/i915/display/intel_vdsc.c
> >>> index 8158e3702ed5..66e810c8de68 100644
> >>> --- a/drivers/gpu/drm/i915/display/intel_vdsc.c
> >>> +++ b/drivers/gpu/drm/i915/display/intel_vdsc.c
> >>> @@ -379,9 +379,11 @@ static int intel_dsc_get_vdsc_per_pipe(const struct intel_crtc_state *crtc_state
> >>> int intel_dsc_get_num_vdsc_instances(const struct intel_crtc_state *crtc_state)
> >>> {
> >>> int num_vdsc_instances = intel_dsc_get_vdsc_per_pipe(crtc_state);
> >>> + int joined_pipes = intel_joiner_num_pipes(crtc_state);
> >>>
> >>> - if (crtc_state->joiner_pipes)
> >>> - num_vdsc_instances *= 2;
> >>> + if (joined_pipes == INTEL_BIG_JOINER_PIPES ||
> >>> + joined_pipes == INTEL_ULTRA_JOINER_PIPES)
> >>> + num_vdsc_instances *= joined_pipes;
> >>>
> >>> return num_vdsc_instances;
> >>> }
> >>> @@ -751,6 +753,14 @@ void intel_uncompressed_joiner_enable(const struct intel_crtc_state *crtc_state)
> >>> }
> >>> }
> >>>
> >>> +static bool intel_crtc_ultrajoiner_enable_needed(const struct intel_crtc_state *crtc_state)
> >>> +{
> >>> + struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
> >>> +
> >>> + return intel_joiner_num_pipes(crtc_state) == INTEL_ULTRA_JOINER_PIPES &&
> >>> + crtc->pipe != PIPE_D;
> >>> +}
> >>> +
> >>> void intel_dsc_enable(const struct intel_crtc_state *crtc_state)
> >>> {
> >>> struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
> >>> @@ -770,7 +780,19 @@ void intel_dsc_enable(const struct intel_crtc_state *crtc_state)
> >>> dss_ctl1_val |= JOINER_ENABLE;
> >>> }
> >>> if (crtc_state->joiner_pipes) {
> >>> + /*
> >>> + * This bit doesn't seem to follow primary/secondary logic or
> >>> + * any other logic, so lets just add helper function to
> >>> + * at least hide this hassle..
> >>> + */
> >>> + if (intel_crtc_ultrajoiner_enable_needed(crtc_state))
> >> What is this crazyness? This would throw a big wrench into
> >> the works, eg. the ultrajoiner readout would not work as intended.
> > Hmm. I do see a note to this effect in bspec. But that doesn't make
> > any real sense. I would expect that we either enable this for
> > everything, or only for pipes A+C (the bigjoiner primaries).
> > The latter would seem sensible, but it would also mean that
> > we need to rethink the readout as well.
>
> Yes as per bspec : The ULTRA_JOINER_ENABLE bit will be set for Pipe A,
> Pipe B and Pipe C only.
>
> Are you suggesting to write this for D as well? or just for A and C?
We need to find out what the hardware actually needs. Do we really have
to set this for A+B+C and not for D, or is it enough to set it for
A+C and not for B+D, and what happens if we try to set it for all pipes.
If the hardware only needs it for some kind of subset of the pipes,
then I think we need to do some kind of slight fixup in the readout
code to convert the masks into a more reasonable form for the
WARN_ON()s/etc.
>
> Also PRIMARY_ULTRA_JOINER_ENABLE is to be set for A. For other pipes
> this bit will be reset.
>
> Though only C is ultrajoiner secondary pipe, but since for other pipes
> this bit is reset, how to make that distinction between C and others.
>
> I mean readout will tell ultrajoiner primary as A and ultrajoiner
> secondary as B,C,D as bit is reset for all three.
>
> Currently we have secondary ultrajoiner pipes reading 0xE.
>
> Regards,
>
> Ankit
>
> >>> + dss_ctl1_val |= ULTRA_JOINER_ENABLE;
> >>> +
> >>> + if (intel_crtc_is_ultrajoiner_primary(crtc_state))
> >>> + dss_ctl1_val |= PRIMARY_ULTRA_JOINER_ENABLE;
> >>> +
> >>> dss_ctl1_val |= BIG_JOINER_ENABLE;
> >>> +
> >>> if (intel_crtc_is_bigjoiner_primary(crtc_state))
> >>> dss_ctl1_val |= PRIMARY_BIG_JOINER_ENABLE;
> >>> }
> >>> --
> >>> 2.45.2
> >> --
> >> Ville Syrjälä
> >> Intel
--
Ville Syrjälä
Intel
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