[PATCH v2 4/4] drm/i915/psr: Do not wait for PSR being idle on on Panel Replay

Manna, Animesh animesh.manna at intel.com
Tue Sep 10 07:24:06 UTC 2024



> -----Original Message-----
> From: Hogander, Jouni <jouni.hogander at intel.com>
> Sent: Friday, September 6, 2024 12:31 PM
> To: intel-gfx at lists.freedesktop.org
> Cc: Deak, Imre <imre.deak at intel.com>; Manna, Animesh
> <animesh.manna at intel.com>; Hogander, Jouni
> <jouni.hogander at intel.com>
> Subject: [PATCH v2 4/4] drm/i915/psr: Do not wait for PSR being idle on on
> Panel Replay
> 
> We do not have ALPM on DP Panel Replay. Due to this SRD_STATUS[SRD
> State] doesn't change from SRDENT_ON after Panel Replay is enabled until it
> gets disabled.
> 
> On eDP Panel Replay DEEP_SLEEP is not reached.
> _psr2_ready_for_pipe_update_locked is waiting DEEP_SLEEP bit getting
> reset.
> 
> Take these into account in Panel Replay code by not waiting PSR getting idle
> after enabling VBI.
> 
> Fixes: 29fb595d4875 ("drm/i915/psr: Panel replay uses SRD_STATUS to track
> it's status")
> Cc: Animesh Manna <animesh.manna at intel.com>
> Signed-off-by: Jouni Högander <jouni.hogander at intel.com>

LGTM.
Reviewed-by: Animesh Manna <animesh.manna at intel.com>

> ---
>  drivers/gpu/drm/i915/display/intel_psr.c | 13 ++-----------
>  1 file changed, 2 insertions(+), 11 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_psr.c
> b/drivers/gpu/drm/i915/display/intel_psr.c
> index 581c409ce7309..1a4ef231a53ca 100644
> --- a/drivers/gpu/drm/i915/display/intel_psr.c
> +++ b/drivers/gpu/drm/i915/display/intel_psr.c
> @@ -2786,13 +2786,6 @@ static int
> _psr1_ready_for_pipe_update_locked(struct intel_dp *intel_dp)
>  				       EDP_PSR_STATUS_STATE_MASK, 50);  }
> 
> -static int _panel_replay_ready_for_pipe_update_locked(struct intel_dp
> *intel_dp) -{
> -	return intel_dp_is_edp(intel_dp) ?
> -		_psr2_ready_for_pipe_update_locked(intel_dp) :
> -		_psr1_ready_for_pipe_update_locked(intel_dp);
> -}
> -
>  /**
>   * intel_psr_wait_for_idle_locked - wait for PSR be ready for a pipe update
>   * @new_crtc_state: new CRTC state
> @@ -2815,12 +2808,10 @@ void intel_psr_wait_for_idle_locked(const struct
> intel_crtc_state *new_crtc_stat
> 
>  		lockdep_assert_held(&intel_dp->psr.lock);
> 
> -		if (!intel_dp->psr.enabled)
> +		if (!intel_dp->psr.enabled || intel_dp-
> >psr.panel_replay_enabled)
>  			continue;
> 
> -		if (intel_dp->psr.panel_replay_enabled)
> -			ret =
> _panel_replay_ready_for_pipe_update_locked(intel_dp);
> -		else if (intel_dp->psr.sel_update_enabled)
> +		if (intel_dp->psr.sel_update_enabled)
>  			ret =
> _psr2_ready_for_pipe_update_locked(intel_dp);
>  		else
>  			ret =
> _psr1_ready_for_pipe_update_locked(intel_dp);
> --
> 2.34.1



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