[PATCH] drm/i915/dp: Fix AUX IO power enabling for eDP PSR

Rodrigo Vivi rodrigo.vivi at intel.com
Tue Sep 10 16:36:46 UTC 2024


On Tue, Sep 10, 2024 at 07:27:49PM +0300, Imre Deak wrote:
> On Tue, Sep 10, 2024 at 10:44:43AM -0400, Rodrigo Vivi wrote:
> > On Tue, Sep 10, 2024 at 02:18:47PM +0300, Imre Deak wrote:
> > > Panel Self Refresh on eDP requires the AUX IO power to be enabled
> > > whenever the output (main link) is enabled. This is required by the
> > > AUX_PHY_WAKE/ML_PHY_LOCK signaling initiated by the HW automatically to
> > > re-enable the main link after it got disabled in power saving states
> > > (see eDP v1.4b, sections 5.1, 6.1.3.3.1.1).
> > > 
> > > The Panel Replay mode on non-eDP outputs on the other hand is only
> > > supported by keeping the main link active, thus not requiring the above
> > > AUX_PHY_WAKE/ML_PHY_LOCK signaling (eDP v1.4b, section 6.1.3.3.1.2).
> > > Thus enabling the AUX IO power for this case is not required either.
> > > 
> > > Based on the above enable the AUX IO power only for eDP/PSR outputs.
> > > 
> > > Bspec: 49274, 53370
> > > 
> > > Cc: Animesh Manna <animesh.manna at intel.com>
> > 
> > Cc: Jouni Högander <jouni.hogander at intel.com>
> > 
> > > Fixes: b8cf5b5d266e ("drm/i915/panelreplay: Initializaton and compute config for panel replay")
> > > Signed-off-by: Imre Deak <imre.deak at intel.com>
> > > ---
> > >  drivers/gpu/drm/i915/display/intel_ddi.c |  2 +-
> > >  drivers/gpu/drm/i915/display/intel_psr.c | 13 +++++++++++++
> > >  drivers/gpu/drm/i915/display/intel_psr.h |  2 ++
> > >  3 files changed, 16 insertions(+), 1 deletion(-)
> > > 
> > > diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c
> > > index 00fbe9f8c03a9..b1c294236cc87 100644
> > > --- a/drivers/gpu/drm/i915/display/intel_ddi.c
> > > +++ b/drivers/gpu/drm/i915/display/intel_ddi.c
> > > @@ -916,7 +916,7 @@ intel_ddi_main_link_aux_domain(struct intel_digital_port *dig_port,
> > >  	 * instead of a specific AUX_IO_<port> reference without powering up any
> > >  	 * extra wells.
> > >  	 */
> > > -	if (intel_encoder_can_psr(&dig_port->base))
> > > +	if (intel_psr_needs_aux_io_power(&dig_port->base, crtc_state))
> > >  		return intel_display_power_aux_io_domain(i915, dig_port->aux_ch);
> > >  	else if (DISPLAY_VER(i915) < 14 &&
> > >  		 (intel_crtc_has_dp_encoder(crtc_state) ||
> > > diff --git a/drivers/gpu/drm/i915/display/intel_psr.c b/drivers/gpu/drm/i915/display/intel_psr.c
> > > index b30fa067ce6e3..f2991dc4a04ab 100644
> > > --- a/drivers/gpu/drm/i915/display/intel_psr.c
> > > +++ b/drivers/gpu/drm/i915/display/intel_psr.c
> > > @@ -205,6 +205,19 @@ bool intel_encoder_can_psr(struct intel_encoder *encoder)
> > >  		return false;
> > >  }
> > >  
> > > +bool intel_psr_needs_aux_io_power(struct intel_encoder *encoder,
> > > +				  const struct intel_crtc_state *crtc_state)
> > > +{
> > > +	/*
> > > +	 * For PSR/PR modes only eDP requires the AUX IO power to be enabled whenever
> > > +	 * the output is enabled. For non-eDP outputs the main link is always
> > > +	 * on, hence it doesn't require the HW initiated AUX wake-up signaling used
> > > +	 * for eDP.
> > 
> > I honestly got confused with this sentence here, because PSR is only a eDP
> > feature. But yeap, we have the DP2.0 panel replay that is based out of eDP PSR,
> > and it looks our code is already inheriting and mixing both.
> > 
> > But anyway, I wonder if this aux thing here would depend on
> > DP_ALPM_AUX_LESS_CAP intel_alpm_aux_less_wake_supported()
> > instead of assuming aux always on for panel replay.
> 
> I think for panel replay aux power should be disabled, regardless of the
> sink's AUX-less wake support. This latter should matter only if the main
> link gets disabled in a power state, like PM_State 3b/ALW_SLEEP, but
> this isn't supported by the HW during panel replay.
> 
> In theory aux could be also left disabled for panel replay on eDP, so
> always if crtc_state->has_panel_replay. However that's separate from the
> fix here for non-eDP connectors, so I'd do that as a follow-up.

Okay, it makes sense

Reviewed-by: Rodrigo Vivi <rodrigo.vivi at intel.com>

> 
> > > +	 */
> > > +	return intel_crtc_has_type(crtc_state, INTEL_OUTPUT_EDP) &&
> > > +	       intel_encoder_can_psr(encoder);
> > > +}
> > > +
> > >  static bool psr_global_enabled(struct intel_dp *intel_dp)
> > >  {
> > >  	struct intel_display *display = to_intel_display(intel_dp);
> > > diff --git a/drivers/gpu/drm/i915/display/intel_psr.h b/drivers/gpu/drm/i915/display/intel_psr.h
> > > index 4e09c10908e4c..6eb5f15f674fa 100644
> > > --- a/drivers/gpu/drm/i915/display/intel_psr.h
> > > +++ b/drivers/gpu/drm/i915/display/intel_psr.h
> > > @@ -25,6 +25,8 @@ struct intel_plane_state;
> > >  				    (intel_dp)->psr.source_panel_replay_support)
> > >  
> > >  bool intel_encoder_can_psr(struct intel_encoder *encoder);
> > > +bool intel_psr_needs_aux_io_power(struct intel_encoder *encoder,
> > > +				  const struct intel_crtc_state *crtc_state);
> > >  void intel_psr_init_dpcd(struct intel_dp *intel_dp);
> > >  void intel_psr_enable_sink(struct intel_dp *intel_dp,
> > >  			   const struct intel_crtc_state *crtc_state);
> > > -- 
> > > 2.44.2
> > > 


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