[PATCH] drm/i915/display: Prevent DC6 while vblank is enabled for Panel Replay

[Ville Syrjälä]

On Wed, Sep 11, 2024 at 03:40:15PM +0300, Jouni Högander wrote:
> We need to block DC6 entry in case of Panel Replay as enabling VBI doesn't
> prevent DC6 in case of Panel Replay. This causes problems if user-space is
> polling for vblank events.
> 
> Fix this by setting target DC state as DC_STATE_EN_UPTO_DC5 when both
> source and sink are supporting eDP Panel Replay and VBI is enabled.
> 
> Closes: https://gitlab.freedesktop.org/drm/xe/kernel/-/issues/2296
> Signed-off-by: Jouni Högander <jouni.hogander at intel.com>
> ---
>  .../gpu/drm/i915/display/intel_display_core.h |  2 +
>  .../gpu/drm/i915/display/intel_display_irq.c  | 48 +++++++++++++++++++
>  2 files changed, 50 insertions(+)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_display_core.h b/drivers/gpu/drm/i915/display/intel_display_core.h
> index 0a711114ff2b4..0707bc2047931 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_core.h
> +++ b/drivers/gpu/drm/i915/display/intel_display_core.h
> @@ -457,6 +457,8 @@ struct intel_display {
>  		/* For i915gm/i945gm vblank irq workaround */
>  		u8 vblank_enabled;
>  
> +		struct work_struct vblank_work;
> +
>  		u32 de_irq_mask[I915_MAX_PIPES];
>  		u32 pipestat_irq_mask[I915_MAX_PIPES];
>  	} irq;
> diff --git a/drivers/gpu/drm/i915/display/intel_display_irq.c b/drivers/gpu/drm/i915/display/intel_display_irq.c
> index 8f13f148c73e3..96abfb356349e 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_irq.c
> +++ b/drivers/gpu/drm/i915/display/intel_display_irq.c
> @@ -15,6 +15,7 @@
>  #include "intel_display_irq.h"
>  #include "intel_display_trace.h"
>  #include "intel_display_types.h"
> +#include "intel_dp.h"
>  #include "intel_dp_aux.h"
>  #include "intel_dsb.h"
>  #include "intel_fdi_regs.h"
> @@ -1361,9 +1362,47 @@ static bool gen11_dsi_configure_te(struct intel_crtc *intel_crtc,
>  	return true;
>  }
>  
> +static void intel_display_vblank_work(struct work_struct *work)
> +{
> +	struct intel_display *display =
> +		container_of(work, typeof(*display), irq.vblank_work);
> +	struct drm_i915_private *i915 = to_i915(display->drm);
> +
> +	/*
> +	 * NOTE: intel_display_power_set_target_dc_state is used only by PSR
> +	 * code for DC3CO handling. DC3CO target states is currently disabled in
> +	 * PSR code. If DC3CO is taken into use we need take that into account
> +	 * here as well.
> +	 */
> +	intel_display_power_set_target_dc_state(i915, display->irq.vblank_enabled ?

Hmm. How racy is this? I suppose workqueue should have sufficient
barriers to make the earlier increment/decrement visible to the
executing work. And vblank_enabled is a u8 so shouldn't tear
even when racing against another concurrent enable/disable.
And the last work scheduled should win out in the end
due to the way workqueue scheduling works. So I guess it works.

Might want to stick a READ_ONCE() here to highlight the
unlocked nature.

I have had some thoughts about reworking the vblank locking to
use per-crtc locks, which would require converting this to a
proper atomic_t though.

> +						DC_STATE_EN_UPTO_DC5 : DC_STATE_EN_UPTO_DC6);
> +}
> +
> +/*
> + * We need to block DC6 entry in case of Panel Replay as enabling VBI doesn't
> + * prevent DC6 in case of Panel Replay. This causes problems if user-space is
> + * polling for vblank events.
> + */
> +static bool block_dc6_needed(struct intel_display *display)
> +{
> +	struct intel_encoder *encoder;
> +
> +	for_each_intel_encoder_with_psr(display->drm, encoder) {
> +		struct intel_dp *intel_dp = enc_to_intel_dp(encoder);
> +
> +		if (!intel_dp_is_edp(intel_dp))
> +			continue;
> +
> +		if (CAN_PANEL_REPLAY(intel_dp))

That depends on intel_dp->psr.sink_panel_replay_support which can
updated during detect(). Granted, for eDP it's only done once,
but as soon as we introduce link off mode for non-eDP this is going
to turn into a race as well.

We might want to stick an actual flag or something into the crtc
itself that we can massage at modeset time to indicate whether
it needs this workaround.

> +			return true;
> +	}
> +	return false;
> +}
> +
>  int bdw_enable_vblank(struct drm_crtc *_crtc)
>  {
>  	struct intel_crtc *crtc = to_intel_crtc(_crtc);
> +	struct intel_display *display = to_intel_display(crtc);
>  	struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
>  	enum pipe pipe = crtc->pipe;
>  	unsigned long irqflags;
> @@ -1371,6 +1410,9 @@ int bdw_enable_vblank(struct drm_crtc *_crtc)
>  	if (gen11_dsi_configure_te(crtc, true))
>  		return 0;
>  
> +	if (block_dc6_needed(display) && display->irq.vblank_enabled++ == 0)
> +		schedule_work(&display->irq.vblank_work);
> +
>  	spin_lock_irqsave(&dev_priv->irq_lock, irqflags);
>  	bdw_enable_pipe_irq(dev_priv, pipe, GEN8_PIPE_VBLANK);
>  	spin_unlock_irqrestore(&dev_priv->irq_lock, irqflags);
> @@ -1436,6 +1478,7 @@ void ilk_disable_vblank(struct drm_crtc *crtc)
>  void bdw_disable_vblank(struct drm_crtc *_crtc)
>  {
>  	struct intel_crtc *crtc = to_intel_crtc(_crtc);
> +	struct intel_display *display = to_intel_display(crtc);
>  	struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
>  	enum pipe pipe = crtc->pipe;
>  	unsigned long irqflags;
> @@ -1446,6 +1489,9 @@ void bdw_disable_vblank(struct drm_crtc *_crtc)
>  	spin_lock_irqsave(&dev_priv->irq_lock, irqflags);
>  	bdw_disable_pipe_irq(dev_priv, pipe, GEN8_PIPE_VBLANK);
>  	spin_unlock_irqrestore(&dev_priv->irq_lock, irqflags);
> +
> +	if (block_dc6_needed(display) && --display->irq.vblank_enabled == 0)
> +		schedule_work(&display->irq.vblank_work);
>  }
>  
>  void vlv_display_irq_reset(struct drm_i915_private *dev_priv)
> @@ -1871,4 +1917,6 @@ void intel_display_irq_init(struct drm_i915_private *i915)
>  		i915->display.irq.display_irqs_enabled = false;
>  
>  	intel_hotplug_irq_init(i915);
> +
> +	INIT_WORK(&i915->display.irq.vblank_work, intel_display_vblank_work);
>  }
> -- 
> 2.34.1

-- 
Ville Syrjälä
Intel