[PATCH 13/15] drm/i915: Compute config and mode valid changes for ultrajoiner
Ville Syrjälä
ville.syrjala at linux.intel.com
Thu Sep 19 18:30:09 UTC 2024
On Wed, Sep 18, 2024 at 08:13:41PM +0530, Ankit Nautiyal wrote:
> From: Stanislav Lisovskiy <stanislav.lisovskiy at intel.com>
>
> Implement required changes for mode validation and compute config,
> to support Ultrajoiner.
>
> v2:
> -Drop changes for HDMI.
> -Separate out DSC changes into another patch.
> v3: Fix check in can_ultrajoiner. (Ankit)
>
> Signed-off-by: Stanislav Lisovskiy <stanislav.lisovskiy at intel.com>
> Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal at intel.com>
> ---
> drivers/gpu/drm/i915/display/intel_dp.c | 44 +++++++++++++++++++++----
> 1 file changed, 37 insertions(+), 7 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
> index 369829ea5a12..4005700ab043 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp.c
> @@ -871,24 +871,34 @@ u32 get_max_compressed_bpp_with_joiner(struct drm_i915_private *i915,
> int num_joined_pipes)
> {
> u32 max_bpp_small_joiner_ram;
> + u32 max_bpp_joiner;
>
> /* Small Joiner Check: output bpp <= joiner RAM (bits) / Horiz. width */
> max_bpp_small_joiner_ram = small_joiner_ram_size_bits(i915) / mode_hdisplay;
> + max_bpp_joiner = max_bpp_small_joiner_ram;
>
> - if (num_joined_pipes == 2) {
> - int bigjoiner_interface_bits = DISPLAY_VER(i915) >= 14 ? 36 : 24;
> + /* if ultra joiner is enabled, we have 2 bigjoiners enabled */
> + if (num_joined_pipes == 2 ||
> + num_joined_pipes == 4) {
I guess just 'num_joined_pipes > 1' or something could be
used for all cases like this.
> + int joiner_interface_bits = DISPLAY_VER(i915) >= 14 ? 36 : 24;
Isn't this specifically about bigjoiner? If so the name should stay as
is.
> /* With bigjoiner multiple dsc engines are used in parallel so PPC is 2 */
> int ppc = 2;
> - u32 max_bpp_bigjoiner =
> - i915->display.cdclk.max_cdclk_freq * ppc * bigjoiner_interface_bits /
> + max_bpp_joiner =
> + i915->display.cdclk.max_cdclk_freq * ppc * joiner_interface_bits /
> intel_dp_mode_to_fec_clock(mode_clock);
>
> max_bpp_small_joiner_ram *= 2;
Can't we just multiply both max_* with num_joined_pipes
to take care of both bigjoiner and ultrajoiner?
>
> - return min(max_bpp_small_joiner_ram, max_bpp_bigjoiner);
> }
> + if (num_joined_pipes == 4) {
> + /* TODO: Check for ultrajoiner ram constraints */
>
> - return max_bpp_small_joiner_ram;
> + /* both get multiplied by 2, because ram bits/ppc now doubled */
> + max_bpp_small_joiner_ram *= 2;
> + max_bpp_joiner *= 2;
> + }
> +
> + return min(max_bpp_small_joiner_ram, max_bpp_joiner);
> }
>
> u16 intel_dp_dsc_get_max_compressed_bpp(struct drm_i915_private *i915,
> @@ -994,6 +1004,10 @@ u8 intel_dp_dsc_get_slice_count(const struct intel_connector *connector,
> if (num_joined_pipes == 2 && test_slice_count < 4)
> continue;
>
> + /* ultrajoiner needs 2 bigjoiners to be enabled */
> + if (num_joined_pipes == 4 && test_slice_count < 8)
> + continue;
> +
> if (min_slice_count <= test_slice_count)
> return test_slice_count;
> }
> @@ -1270,6 +1284,18 @@ intel_dp_mode_valid_downstream(struct intel_connector *connector,
> return MODE_OK;
> }
>
> +static
> +bool intel_dp_needs_ultrajoiner(struct intel_dp *dp, int clock)
> +{
> + const struct intel_encoder *encoder = &dp_to_dig_port(dp)->base;
> + struct drm_i915_private *i915 = to_i915(encoder->base.dev);
struct intel_display *display = intel_display(intel_dp);
> +
> + if (!HAS_ULTRAJOINER(i915))
> + return false;
> +
> + return clock > (i915->display.cdclk.max_dotclk_freq * 2);
Redundant parens.
> +}
> +
> static
> bool intel_dp_needs_bigjoiner(struct intel_dp *intel_dp,
> struct intel_connector *connector,
> @@ -1296,6 +1322,8 @@ int intel_dp_compute_num_pipes(struct intel_dp *intel_dp,
> MISSING_CASE(connector->force_joined_pipes);
> fallthrough;
> case 0:
> + if (intel_dp_needs_ultrajoiner(intel_dp, clock))
Hmm. Technically we should be checking the same things for both
bigjoiner and ultrajoiner.
How about something like this with parametrized number
of pipes:
bool intel_dp_needs_joiner(struct intel_dp *intel_dp,
struct intel_connector *connector,
int hdisplay, int clock,
int num_joined_pipes)
{
if (!intel_dp_has_joiner(intel_dp))
return false;
num_joined_pipes /= 2;
return clock > num_joined_pipes * max_dotclk_freq ||
hdisplay > num_joined_pipes * 5120;
}
Pair that with HAS_*JOINER(), and pass in the correct number
of joined pipes to get final answer.
> + return 4;
> if (intel_dp_needs_bigjoiner(intel_dp, connector, hdisplay, clock))
> return 2;
> }
> @@ -2542,8 +2570,10 @@ bool intel_dp_joiner_needs_dsc(struct drm_i915_private *i915,
> * Pipe joiner needs compression up to display 12 due to bandwidth
> * limitation. DG2 onwards pipe joiner can be enabled without
> * compression.
> + * Ultrajoiner always needs compression.
> */
> - return !HAS_UNCOMPRESSED_JOINER(i915) && num_joined_pipes == 2;
> + return (!HAS_UNCOMPRESSED_JOINER(i915) && num_joined_pipes == 2) ||
> + num_joined_pipes == 4;
> }
>
> static int
> --
> 2.45.2
--
Ville Syrjälä
Intel
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