[PATCH 2/3] drm/i915/dp: read Aux RD interval after reading the FFE preset
Murthy, Arun R
arun.r.murthy at intel.com
Tue Sep 24 05:58:36 UTC 2024
> > > > - /*
> > > > - * The delay may get updated. The transmitter shall read the
> > > > - * delay before link status during link training.
> > > > - */
> > > > - delay_us =
> > > > drm_dp_128b132b_read_aux_rd_interval(&intel_dp->aux);
> > > > -
> > > > if (drm_dp_dpcd_read_link_status(&intel_dp->aux,
> > > > link_status) < 0) {
> > > > lt_err(intel_dp, DP_PHY_DPRX, "Failed to read link
> > > status\n");
> > > > return false;
> > > > @@ -1457,6 +1451,12 @@ intel_dp_128b132b_lane_eq(struct intel_dp
> > > > *intel_dp,
> > > > lt_err(intel_dp, DP_PHY_DPRX, "Failed to update TX
> > > FFE
> > > > settings\n");
> > > > return false;
> > > > }
> > > > +
> > > > + /*
> > > > + * The delay may get updated. The transmitter shall read the
> > > > + * delay before link status during link training.
> > > > + */
> > >
> > > The comment needs to be updated as this is not being done before
> > > link status Also a question does this not conflict with the
> > > requirement we previously had (reading it before link status) ?
> > >
>
> Also this whole delay us read should be called much below in the sequence
> from what I can see In the dp spec just before we adjust the ffe settings at this
> point
>
> /* Update signal levels and training set as requested. */
> intel_dp_get_adjust_train(intel_dp, crtc_state, DP_PHY_DPRX,
> link_status);
> if (!intel_dp_update_link_train(intel_dp, crtc_state, DP_PHY_DPRX)) {
> lt_err(intel_dp, DP_PHY_DPRX, "Failed to update TX FFE
> settings\n");
> return false;
> }
>
Yes as per the spec,
" During LT, the transmitter shall read DPCD 02216h before DPCD 00202h through 00207h, and 0200Ch through 0200Fh."
Will change it accordingly.
Thanks and Regards,
Arun R Murthy
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