[PATCHv2 2/3] drm/i915/dp: read Aux RD interval just before reading the FFE preset
Murthy, Arun R
arun.r.murthy at intel.com
Wed Sep 25 03:51:17 UTC 2024
> > + /*
> > + * During LT, Tx shall read DPCD 02216h before DPCD 00202h
> to 00207h and
> > + * 0200Ch through 0200Fh.
> > + */
>
> I really like comments that are actual helpful sentences. Why do I I need to look
> up what 02216h and 00202h-00207h are? What's wrong with the original
> comment?
>
Original comment was wrong "read delay before reading link status"
In the updated comment will replace the registers with meaningful name.
Thanks and Regards,
Arun R Murthy
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